Method of fabricating an isolated p-n junction

Metal treatment – Compositions – Heat treating

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148187, 148188, 357 90, 357 91, H01L 21383

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active

040010503

ABSTRACT:
A method of forming dielectrically isolated islands of semiconductor material on which discrete devices may be formed is disclosed. A wafer of semiconductive material is provided with an oxide layer and, by ion implantation, is lightly doped after which, openings are formed in the oxide. The portions of wafer exposed by the openings are then heavily doped and the wafer is then subjected to a high temperature step to drive in the dopants and produce isolated areas.

REFERENCES:
patent: 3685140 (1972-08-01), Engeler
patent: 3717507 (1973-02-01), Abe
patent: 3729811 (1973-05-01), Beale et al.
patent: 3756861 (1973-09-01), Payne et al.
patent: 3856578 (1974-12-01), Payne et al.
patent: 3891480 (1975-06-01), Fulkerson
patent: 3898105 (1975-08-01), Mai et al.

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