Metal treatment – Process of modifying or maintaining internal physical... – Chemical-heat removing or burning of metal
Patent
1977-12-29
1979-02-20
Dean, R.
Metal treatment
Process of modifying or maintaining internal physical...
Chemical-heat removing or burning of metal
29576W, 29577C, 148 15, 148187, 357 44, 357 46, 357 48, 357 89, 357 90, 357 91, 357 92, H01L 2120, H01L 2702
Patent
active
041405595
ABSTRACT:
An integrated circuit having a substrate of a first conductivity type, a first layer of opposite conductivity type thereon and a second layer of said first conductivity type inversely graded on said first layer and including a heavily doped region adjacent the surface opposite said first layer. A ring of said opposite conductivity type extends through said second layer and partially into said first layer and a diffused region of said opposite conductivity type is in the surface of said second layer.
The method of fabrication includes epitaxially forming said first layer on said substrate, expitaxially forming said second layer on said first layer having a decreasing impurity concentration from the P-N junction to the surface, forming said ring, nonselectively diffusing to increase the impurity concentration at the area adjacent the surface of said second layer and selectively diffusing to form said diffused surface region.
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patent: 4056810 (1977-11-01), Hart et al.
patent: 4064526 (1977-12-01), Tokumaru et al.
Blatt et al., "Substrate Fed Logic - An Improved Form of Injection Logic", Technical Digest, 1974 International Electron Dev. Mtg., Wash. D.C., pp. 511-514.
Cook et al., "I.sup.2 L II", IEEE International Electron Dev. Mtg., 1975, pp. 284-287.
Cook, Bob, "Anodizing Silicon . . . . To Isolate IC Elements", Electronics, Nov. 13, 1975, pp. 109-113.
Berger et al., "Bipolar LSI . . . . part 2 . . . . Limits", Electronics, Oct. 2, 1975, pp. 99-103.
Dean R.
Harris Corporation
Saba W. G.
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