Method of fabricating an electronic device with reduced suscepti

Fishing – trapping – and vermin destroying

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Details

437175, 437176, 437184, 437912, 148DIG139, 148DIG140, H01L 21338

Patent

active

051438577

ABSTRACT:
A method of fabricating an integrated circuit comprises providing a heavily compensated substrate having a source region, a drain region and a third region, each of a first conductivity type, and introducing dopant of a second conductivity type into the substrate to surround the third region.

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