Method of fabricating a trench-structure capacitor device

Details Method of fabricating a trench-structure capacitor device Method of fabricating a trench-structure capacitor device

2002-09-03

2004-02-17

Smith, Matthew (Department: 2825)

Semiconductor device manufacturing: process

Making passive device

Trench capacitor

C438S240000, C438S253000, C438S396000, C438S239000, C438S243000, C438S246000

Reexamination Certificate

active

06693016

ABSTRACT:

BACKGROUND OF THE INVENTION
Field of the Invention
The invention lies in the semiconductor technology field. More specifically, the invention relates to a method for fabricating a trench-structure capacitor device, in particular for a DRAM or the like.
One principal aspect of the ongoing development of modern semiconductor circuit configurations and in particular semiconductor memory technologies is that of increasing the integration density. In this context, the endeavor is to increase the number of switching elements or memory cells which can be formed per unit area in a semiconductor substrate or the like, in order to be able to achieve circuits, in particular semiconductor memories, which are as small, compact and powerful as possible.
Many semiconductor circuit configurations require capacitor configurations, for example including in the form of storage capacitors or the like. These capacitor configurations are often formed as so-called trench capacitors or trench-structure capacitors or they are in the form of stacked capacitors. In dynamic read/write memories, for example of the DRAM type, capacitor configurations of this type are used, for example in single-transistor cells, as memory elements. A select transistor thereby connects the storage capacitor to a bit line.
The structural design and the fabrication of capacitor structures or capacitor configurations are, in very general terms, problematical and of interest if the integration density is to be increased. In the above text and in the text which follows, the term capacitor structure or capacitor configuration is to be understood in very general terms as an arrangement comprising a first material region, which serves as an electrode region, substantially directly spatially adjacent to a second material region, which serves as a dielectric region, and a counterelectrode which adjoins the dielectric region.
On account of the requirements with regard to the increased integration of known semiconductor memory devices, it is also necessary for the corresponding capacitor devices to be further miniaturized. However, for capacitor devices of this type to operate reliably, it is imperative that a certain minimum capacitance be provided. However, since the capacitance of the capacitor—in particular with parameters which are otherwise constant—is closely correlated to the surface dimensions of the capacitor device, accordingly a minimum size, i.e. a minimum extent of the opposite electrode regions with the dielectric region between them, is necessary in order to achieve a minimum capacitance. However, maintaining a minimum size runs decisively counter to the desire to further increase the integration density of semiconductor memory devices.
SUMMARY OF THE INVENTION
It is accordingly an object of the invention to provide a method of fabricating a trench structure capacitor configuration which overcomes the above-mentioned disadvantages of the heretofore-known devices and methods of this general type and which makes it easy to ensure a suitable minimum capacitance even when the dimensions are reduced further.
With the foregoing and other objects in view there is provided, in accordance with the invention, a method of fabricating a trench-structure capacitor device, which comprises:
forming a trench structure with at least one trench in a semiconductor substrate, the trench having a base region, lower wall regions, and upper wall regions;
forming a configuration including a first electrode region, a second electrode region, and a dielectric region therebetween in the trench, wherein at least the lower wall regions and the base region of the trench are lined with a part of the first electrode region, the second electrode region and the dielectric region;
freeing or leaving clear the upper wall regions of material of the first electrode region, of the dielectric region and of the second electrode region, such that a material of the upper wall region of the trench lies exposed;
forming the upper wall region of the trench with an insulation region by selective, thermally induced conversion of the material of the upper wall region;
wherein the first electrode region is formed at least in part from at least one metallic material or metal nitride;
wherein firstly the first electrode region is formed; and
the dielectric region is subsequently formed conformally by a process selected from the group consisting of physical, chemical, electrochemical, and oxidative conversion of at least part of the first electrode region.
In other words, the inventive method for fabricating a trench-structure capacitor device or the like, in particular for a semiconductor memory device, a DRAM or the like, a trench structure which has at least one recess or trench is formed in a semiconductor substrate, a passivation region and/or a surface region thereof. Furthermore, an arrangement having a first electrode or a first electrode region, a second electrode or a second electrode region and/or a dielectric region provided substantially therebetween, in particular in this order, in each case in substantially continuous form, is formed at least in the region of the trench, at least lower wall regions or lower edge regions and/or base regions of the trench being, at least in part, substantially covered and/or lined at least with a part of the first electrode region, of the dielectric region and/or of the second electrode region. The arrangement of the electrode regions with the dielectric provided between them then in each case leads to the formation of the corresponding capacitor device.
In the method according to the invention for fabricating a trench-structure capacitor device for a semiconductor circuit configuration and in particular for a semiconductor memory device, a DRAM or the like, it is furthermore provided that at least the second electrode region and, under certain circumstances, the first electrode region are formed at least in part from at least one metallic material, metal nitride and/or the like.
Furthermore, in the method according to the invention for fabricating a trench-structure capacitor device, it is provided that upper edge regions of the trench are formed with an insulation region, for example what is known as a collar region or an insulating collar. A further inventive measure consists in the upper edge regions of the trench being freed of the material of the first electrode region, the dielectric region and/or the second electrode region or being left clear. This is achieved by the material of the upper edge region or wall region of the trench itself being uncovered. According to the invention, this uncovered region of the material of the upper edge region or wall region of the trench is converted into an insulation region by selective, thermally induced conversion of the material of the upper edge regional wall region which is present there, in particular by an oxidation process or the like. In this context, the term “selective” is to be understood as meaning a treatment in an H
2
-rich environment.
Therefore, a basic idea of the present invention is, during the formation of the trench-structure capacitor device, on the one hand to provide a sufficient capacitance of the capacitor by means of the choice of materials used for the respective electrode regions and/or for the dielectric region and the patterning thereof, even at high integration densities, i.e. a reduced size or dimension of the capacitor surface area, and, on the other hand, to form the required insulation region or collar region in the upper wall region or edge region of the trench in a particularly simple manner, by means of a corresponding procedure, such that additional alignment and orientation of the collar region with respect to the arrangement in the trench and in particular with respect to the arrangement comprising first electrode region, second electrode region and dielectric region arranged therebetween can be dispensed with. According to the invention, this is achieved precisely by the fact that the upper wall regions or edge regions of the trench, in w

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