Method of fabricating a thin film transistor using hydrogen plas

Details Method of fabricating a thin film transistor using hydrogen plas Method of fabricating a thin film transistor using hydrogen plas

1992-09-02

1994-01-25

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 41, 437101, 437937, 148DIG1, H01L 21265

Patent

active

052815463

ABSTRACT:
A method of fabricating a thin film transistor (TFT) including the steps of forming a gate conductor on a substrate; depositing a gate dielectric layer over the gate conductor; depositing a layer of amorphous silicon over the gate dielectric layer; treating the exposed surface of the amorphous silicon with a hydrogen plasma; depositing a layer of n+ doped silicon over the treated amorphous silicon surface such that an interface is formed between the amorphous silicon and the n+ doped layer that has relatively low contact resistance; depositing a layer of source/drain metallization over the n+ doped layer; and patterning the source/drain metallization and portions of the underlying n+ doped layer to form source and drain electrodes. The TFT material layers are preferably deposited by plasma enhanced chemical vapor deposition. The hydrogen plasma treatment is advantageously used both when vacuum is maintained during the various deposition steps, and when vacuum is broken, for the purposes of patterning the amorphous silicon layer or the like, such that the amorphous silicon layer is passivated with the hydrogen plasma treatment prior to the deposition of the n+ doped layer.

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