Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Patent
1998-11-18
2000-09-05
Dang, Trung
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Grooved and refilled with deposited dielectric material
438424, 438437, 148DIG50, H01L 2176
Patent
active
061142204
ABSTRACT:
A method of fabricating a shallow trench isolation includes formation of a trench in a substrate. An oxide layer is formed on the substrate to fill the trench. A barrier layer and a coating layer are formed in sequence over the substrate. A first etching step is performed to remove a portion of the coating layer and the oxide layer to at least expose the oxide layer on the mask layer. A second etching step is performed to remove the other portion of the coating layer and the oxide layer until exposing the mask layer. Thus, micro-scratches and defects do not happen and thus the invention prevents the occurrence of bridging effect and short circuits.
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Dang Trung
United Microelectronics Corp.
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