Method of fabricating a semiconductor structure

Details Method of fabricating a semiconductor structure Method of fabricating a semiconductor structure

1996-11-08

1999-06-15

Valentine, Donald R.

Electrolysis: processes, compositions used therein, and methods

Electrolytic coating

Coating selected area

205210, 205219, 205674, 205684, 205686, C25F 312

Patent

active

059118644

ABSTRACT:
The present invention provides for a wet etch and method for preparing a semiconductor device structure from a silicon carbide wafer. A first embodiment of the wet etch comprises a vessel, a tetrahydrofurfuryl alcohol and potassium nitrite etching solution within the vessel, an electrode, a wafer support for positioning at least a portion of the silicon carbide wafer within the etching solution, and a voltage source coupled with the electrode and the wafer support. A second embodiment of the wet etch comprises a wafer carrier for holding at least one wafer, a polishing plate adjacent the wafer carrier, a voltage source having a first terminal electrically coupled with the wafer and a second terminal electrically coupled with the polishing plate, and an applicator adjacent the polishing plate for depositing an etching solution on a surface of the polishing plate.

REFERENCES:
patent: 3078219 (1963-02-01), Chang
patent: 3230160 (1966-01-01), Kennedy
patent: 4194954 (1980-03-01), Faktor et al.
patent: 4462856 (1984-07-01), Abe et al.
patent: 5110428 (1992-05-01), Prigge et al.
"Chemical Behavior of Semiconductors: Etching Characteristics", by H.C. Gatos, M.C. Lavine, Technical Report, Massachusetts Institute of Technology, Lincoln Laboratory, Jan. 2, 1963.

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