Fishing – trapping – and vermin destroying
Patent
1994-01-25
1996-03-05
Fourson, George
Fishing, trapping, and vermin destroying
437978, 437247, 257316, 257324, 257326, H01L 218247
Patent
active
054967538
DESCRIPTION:
BRIEF SUMMARY
TECHNICAL FIELD
The present invention relates to a semiconductor nonvolatile storage element (nonvolatile memory), a semiconductor device on which the nonvolatile memory is mounted and a method of fabricating them, particularly to a nonvolatile memory having a MONOS or MNOS structure, a semiconductor device on which the nonvolatile memory is mounted and a method of fabricating them, and a structure of the nonvolatile memory having storage element regions and field regions and a method of fabricating the same.
BACKGROUND TECHNOLOGY
A semiconductor nonvolatile storage element in which data is electrically rewriteable and which is called as an EEPROM has many types and comprises typically a MONOS memory, a MNOS memory and a floating gate memory.
The MONOS memory is a semiconductor nonvolatile storage element having the structure of Metal-Oxide-Nitride-Oxide-Semiconductor in a cross section while the MNOS memory is a semiconductor nonvolatile storage element having the structure of Metal-Nitride-Oxide-Semiconductor in a cross section.
The MONOS memory is the nonvolatile storage element which realizes a high reliability and a thin film by subjecting the memory nitride film of a prior art MONOS memory to the thermal oxidation for thereby forming the oxide film on the memory nitride film. The oxide film layered on the memory nitride film is normally called a "top oxide film" while the oxide film layered under the memory nitride film is called a "tunnel oxide film".
The MONOS memory has lately attracted considerable attention because it has a high reliability and data is rewriteable therein many times.
The MONOS memory comprises, for example, as shown in FIG. 2, a semiconductor substrate 1, a tunnel oxide film 3, a memory nitride film 5, a top oxide film 7 and a memory gate electrode film 9. In the prior art MONOS memory, the top oxide film 7, memory nitride film 5, the tunnel oxide film 3 and the memory gate electrode film 9 are formed of respectively the same patterns having the same sizes at least within the storage element region.
FIG. 2 is a cross-sectional view showing the arrangement of a semiconductor device on which the prior art MONOS memory is mounted wherein only the gate of the MONOS memory within the storage element region and the portion adjoining thereto and the gate of the MOS transistor constituting a peripheral circuit are shown and the portion adjoining thereto but the illustration of the interconnections with metallizations is omitted.
With reference to FIG. 2 describing the structure of the MONOS memory in detail, there are formed the tunnel oxide film 3, the memory nitride film 5, the top oxide film 7 and the memory gate electrode film 9 which are sequentially layered in this order and have the same pattern sizes within the storage element region on the surface of the semiconductor substrate 1.
A gate oxide film 11 of the MOS transistor constituting the peripheral circuit is formed on the surface of the semiconductor substrate 1 outside the storage element region and a gate electrode film 13 of the MOS transistor is formed on the gate oxide film 11.
The memory gate electrode film 9 and the gate electrode film 13 of the MOS transistor can be formed in the same step or in different steps. The memory gate electrode film 9 and the gate electrode film 13 of the MOS transistor are generally formed in the same step so as to not impede the MOS transistor characteristics of the peripheral circuit.
That is, such a semiconductor nonvolatile storage element is normally fabricated as a semiconductor device which is integrated with the peripheral circuit to form a chip.
In case of fabricating the nonvolatile storage element as the semiconductor device, there is a case to lay stress on the nonvolatile memory characteristics such as a rewriteable speed or a data holding characteristics or a case to lay stress on the peripheral circuit characteristics.
The nonvolatile memory characteristics is laid on stress in case that a general purpose memory and the peripheral circuit comprise mostly a digital circui
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Kishi Toshiyuki
Sakurai Yasuhiro
Booth Richard A.
Citizen Watch Co. Ltd.
Fourson George
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