Method of fabricating a semiconductor integrated circuit having

Details Method of fabricating a semiconductor integrated circuit having Method of fabricating a semiconductor integrated circuit having

1997-07-15

1999-09-21

Chaudhuri, Olik

Semiconductor device manufacturing: process

Making passive device

Stacked capacitor

257310, 438399, H01L 218242

Patent

active

059565950

ABSTRACT:
In order to fabricate a semiconductor device having a stacked capacitor cell, a silicon substrate is first prepared. A lower capacitor electrode having a porous surface is then formed on the silicon substrate. Following this, the lower capacitor electrode is selectively covered with a titanium nitride film. Further, a dielectric film of a material, exhibiting high permittivity or feroelectricity, is deposited on said titanium nitride film, and an upper capacitor electrode is deposited on the dielectric film.

REFERENCES:
patent: 5110752 (1992-05-01), Lu
patent: 5688724 (1997-11-01), Yoon et al.
Anomalous Ti Salicide Gate to Source/Drain Shorts Induced By Dry Etch During TiSi2 Local Interconnet Formation, W. Ting, pp. 283-285, IEEE, Electron Device Letters, vol., 15, Aug. 1994.
K. Shibahara et al., "1GDRAM Cell with Diagonal Bit-Line (DBL) Configuration and Edge Operation MOS(EOS) FET", IEDM 94, Dec. 14, 1994, pp. 639-642.

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