Fishing – trapping – and vermin destroying
Patent
1993-12-17
1994-12-27
Hearn, Brian E.
Fishing, trapping, and vermin destroying
437 40, 437913, H01L 2170
Patent
active
053765788
ABSTRACT:
A method of forming a MOS FET in which the source, drain, and isolation are all raised above the surface of the single crystal silicon includes the steps of depositing a blanket gate stack including the gate oxide and a set of gate layers, and then depositing isolation members in apertures etched in the gate stack using the gate oxide as an etch stop. The sidewalls that are used to form an LDD source and drain separate a gate contact from source and drain contacts.
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Hsu Louis L.
Ogura Seiki
Shepard Joseph F.
Hearn Brian E.
International Business Machines - Corporation
Trinh Michael
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