Semiconductor device manufacturing: process – Making device array and selectively interconnecting – Using structure alterable to nonconductive state
Reexamination Certificate
2002-07-25
2004-11-09
Wilson, Allan R. (Department: 2815)
Semiconductor device manufacturing: process
Making device array and selectively interconnecting
Using structure alterable to nonconductive state
C257S529000, C257S643000, C257S758000, C438S622000, C438S725000
Reexamination Certificate
active
06815265
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to a semiconductor device, and more specifically, it relates to a semiconductor device having a passivation film relieved of stress applied to wiring capacity and a wire. The present invention also relates to a method of fabricating such a semiconductor device.
2. Description of the Background Art
In order to protect a semiconductor device, a passivation film is formed on the surface of the semiconductor device.
In general, a two-layer passivation film of SiO
2
and SiN is employed for relaxing stress applied to wiring capacity and a wire.
A method of fabricating a semiconductor device employing such a two-layer passivation film is now described.
Referring to
FIG. 11
, a fuse
2
is formed on a semiconductor substrate
1
. The fuse
2
is employed for redundancy of a memory cell, for example. The function of this fuse
2
is described later. The fuse
2
is made of polysilicon or Al.
Referring to
FIG. 12
, an uppermost interlayer isolation film
3
is formed on the semiconductor substrate
1
to cover the fuse
2
. An uppermost wire
4
of a bimetal is formed on the uppermost interlayer isolation film
3
.
Referring to
FIG. 13
, a silicon oxide film
5
is formed on the uppermost interlayer isolation film
3
by a plasma method to cover the uppermost wire
4
. The plasma method is employed since the uppermost wire
4
is dissolved due to a high temperature if the silicon oxide film
5
is formed by a method other than the plasma method. Therefore, only the plasma method can be employed for forming the silicon oxide film
5
in this case.
Referring to
FIGS. 13 and 14
, the silicon oxide film
5
is etched back and partially left only on the side walls and the upper surface of the uppermost wire
4
. Thereafter a nitride film
6
is formed on the semiconductor substrate
1
.
Referring to
FIG. 15
, a polyimide film
7
is formed on the nitride film
6
.
Referring to
FIG. 16
, the fuse
2
is cut by laser blowing, and hence the portion of the uppermost interlayer isolation film
3
located on the fuse
2
must be reduced in thickness.
Therefore, a hole
8
for introducing a laser beam is formed to pass through portions of the polyimide film
7
and the nitride film
6
located above the fuse
2
, as shown in FIG.
16
.
Referring to
FIG. 17
, the surface of the uppermost interlayer isolation film
3
is partially etched through the hole
8
for optimizing the thickness of the portion of the uppermost interlayer isolation film
3
located on the fuse
2
. Thereafter the fuse
2
is cut by laser blowing, thereby completing the semiconductor device.
FIG. 18
illustrates a problem caused when the thickness of the portion of the uppermost interlayer isolation film
3
located on the fuse
2
is not optimized. If the thickness of the portion of the uppermost interlayer isolation film
3
located on the fuse
2
is left intact, the laser beam for cutting the fuse
2
is so increased in energy that the same disadvantageously cuts an adjacent fuse
2
a
not to be cut, leading to a failure in formation of the target semiconductor device. Therefore, the thickness of the portion of the uppermost interlayer isolation film
3
located on the fuse
2
must be reduced and optimized.
The conventional semiconductor device including the fuse
2
is fabricated in the aforementioned manner.
Referring again to
FIG. 13
, the nitride film
6
is formed by plasma CVD (chemical vapor deposition), disadvantageously leading to inferior coverage.
When the uppermost wire
4
is formed adjacently to another uppermost wire
4
a
as shown in FIG.
19
and the nitride film
6
is formed by plasma CVD, a cavity
9
is defined due to inferior coverage to disadvantageously reduce the reliability of the semiconductor device.
SUMMARY OF THE INVENTION
The present invention has been proposed in order to solve the aforementioned problem, and an object thereof is to provide a method of fabricating a semiconductor device improved to be capable of forming a nitride film on an uppermost wire with excellent coverage.
Another object of the present invention is to provide a highly reliable method of fabricating a semiconductor device through the same number of steps as the prior art with no requirement for additional steps.
Still another object of the present invention is to provide a method of fabricating a semiconductor device improved to be capable of optimizing the thickness of a portion of an uppermost interlayer isolation film located on a fuse with no requirement for additional steps.
A further object of the present invention is to provide a highly reliable semiconductor device obtained by such a method.
A semiconductor device according to a first aspect of the present invention comprises a semiconductor substrate. An uppermost interlayer isolation film is provided on the aforementioned semiconductor substrate. An uppermost wire is provided on the aforementioned uppermost interlayer isolation film. A silicon oxide film is provided to cover the upper surface and the side wall of the aforementioned uppermost wire. A nitride film is provided on the aforementioned uppermost interlayer isolation film to cover the aforementioned uppermost wire through the aforementioned silicon oxide film. A polyimide film is provided on the aforementioned nitride film. A portion of the aforementioned uppermost interlayer isolation film other than portions located under the aforementioned uppermost wire and on the side wall of the aforementioned silicon oxide film is downwardly scooped. The aforementioned nitride film covers the scooped portion of the aforementioned uppermost interlayer isolation film.
In a method of fabricating a semiconductor device according to a second aspect of the present invention, an uppermost interlayer isolation film of SiO
2
is first formed on a semiconductor substrate. An uppermost wire is formed on the aforementioned uppermost interlayer isolation film. A silicon oxide film is formed on the aforementioned uppermost interlayer isolation film by a plasma method, to cover the aforementioned uppermost wire. The aforementioned silicon oxide film is etched back for downwardly scooping a portion of the aforementioned uppermost interlayer isolation film other than portions located under the aforementioned uppermost wire and on the side wall of the aforementioned silicon oxide film. A nitride film is formed on the aforementioned uppermost interlayer isolation film to cover the surface of the aforementioned scooped portion. A polyimide film is formed on the aforementioned nitride film.
The foregoing and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.
REFERENCES:
patent: 4928161 (1990-05-01), Kobayashi
patent: 5508540 (1996-04-01), Ikeda et al.
patent: 6291837 (2001-09-01), Nakajima et al.
patent: 6294474 (2001-09-01), Tzeng et al.
patent: 6372554 (2002-04-01), Kawakita et al.
patent: 2000077677 (2000-03-01), None
Kobayashi Heiji
Nakatani Shinya
McDermott Will & Emery LLP
Renesas Technology Corp.
Wilson Allan R.
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