Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Reexamination Certificate
2001-08-22
2004-06-29
Chen, Kin-Chan (Department: 1765)
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
C438S714000
Reexamination Certificate
active
06756312
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method of fabricating a semiconductor device and a wafer treatment apparatus employed therefor as well as a semiconductor device and a cleaning method after formation of a gate electrode, and more particularly, it relates to a method of fabricating a semiconductor device capable of attaining high etching selectivity and a cleaning method after formation of a gate electrode, a wafer treatment method employed for the fabrication method or the cleaning method and a semiconductor device obtained by the fabrication method.
2. Description of the Prior Art
High performance is required particularly in a transistor employed for a logic circuit or a system LSI (large-scale integrated circuit) among semiconductor devices. In order to satisfy this requirement, the thickness of a gate insulation film of the transistor is set to not more than 3 nm. Further, a development has recently been made for reducing the thickness of the gate insulating film below 2 nm.
In etching for forming a gate electrode of the transistor, a conductive layer for defining the gate electrode is substantially etched under a condition having high selectivity for the gate insulator film, thereby preventing the thin gate insulator film from etching.
In the etching for forming the gate electrode, a reaction product resulting from the etching adheres to the surfaces of the side walls of the gate electrode and the surface of a mask member for patterning the gate electrode. It has been recognized by observation with an SEM (scanning electron microscope) that such a reaction product adheres to the surfaces substantially in a conformal state. In order to ensure reliability of a semiconductor device, such a reaction product adhering to the surface of the gate electrode must be removed.
In order to remove such a reaction product, wet cleaning employing a chemical solution is generally performed. An exemplary method of fabricating a semiconductor device including this wet cleaning is now described.
First, an insulator film for defining a gate insulator film is formed on a semiconductor substrate. A polysilicon film for defining a gate electrode is formed on the insulator film. A silicon oxide film for defining a mask member for forming the gate electrode is formed on the polysilicon film. The silicon oxide film is subjected to prescribed etching, for forming the mask member.
The polysilicon film is etched through the mask member in an atmosphere prepared by converting a gas mixture containing Cl
2
and O
2
or HBr, Cl
2
and O
2
, for example, into a plasma, patterning the gate electrode. In this patterning, a reaction product adheres to the side wall surfaces of the gate electrode and the surface of the mask member. After formation of the gate electrode, the reaction product adhering to the gate electrode is removed by wet cleaning.
It is known that the reaction product is mainly composed of a silicon oxide such as SiO
x
Cl
y
or SiO
x
Br
y
when the polysilicon film is etched by converting the gas mixture containing Cl
2
and O
2
or HBr, Cl
2
, and O
2
to a plasma.
Therefore, the reaction product is removed by dipping the semiconductor substrate in a cleaning solution of diluted hydrofluoric acid (DHF) or aqueous ammonia peroxyhydrate (NH
4
OH+H
2
O
2
+H
2
O:APM), for example. Thus, the reaction product is removed for forming the gate electrode.
After the reaction product is removed, the mask member remaining on the gate electrode must be removed in order to electrically connect the gate electrode with a wire through a tungsten plug embedded in a contact hole, for example.
This mask member is formed by a silicon oxide film such as a TEOS (tetraethyl orthosilicate glass) oxide film. Therefore, the mask member consisting of the silicon oxide film is removed by diluted hydrofluoric acid, for example. Thus, the silicon oxide film serving as the mask member is removed for forming the gate electrode.
However, the conventional method of fabricating a semiconductor device has the following problems:
As hereinabove described, the reaction product adhering to the surfaces of the side walls of the gate electrode and the like when forming the gate electrode is mainly composed of a silicon oxide such as SiO
x
Cl
y
or SiO
x
Br
y
. The gate insulator film also consists of a silicon oxide obtained by oxidizing the silicon substrate.
When the reaction product is removed by the cleaning solution of diluted hydrofluoric acid (DHF) or aqueous ammonia peroxyhydrate (APM), therefore, the gate insulator film is also etched.
Therefore, a gate insulator film
102
located between a silicon substrate
101
and a gate electrode
103
may be partially etched to expose a corner portion of the gate electrode
103
, as shown in a circle
105
in
FIG. 27
, for example.
Therefore, a current leaks from the exposed corner portion of the gate electrode
103
to deteriorate electric characteristics of the transistor, disadvantageously resulting in reduction of reliability of the semiconductor device.
When a reaction product is removed with aqueous ammonia peroxyhydrate (APM) in a gate electrode
103
having a polycide structure formed by a polysilicon film
103
a
and a tungsten silicide film
103
b
as shown in
FIG. 28
, for example, a side wall portion of the tungsten silicide film
103
b
may be also etched (side-etched) in addition to a gate insulator film
102
(a portion in a circle
105
).
In this case, the etched portion may not be fully filled but produce a void when the gate electrode
103
is covered with an interlayer isolation film, and reduce the reliability of the semiconductor device.
Further, the silicon oxide film serving as the mask member is removed by diluted hydrofluoric acid, as hereinabove described. However, the gate insulator film
102
, also formed by a silicon oxide film, is simultaneously etched when the mask member is removed.
Therefore, the gate insulator film
102
located between the silicon substrate
101
and the gate electrode
103
may be partially etched to expose another corner portion located under the gate electrode
103
, as shown in a circle
105
in FIG.
29
.
Consequently, the current leaks from the exposed corner portion
105
located under the gate electrode
103
, to disadvantageously deteriorate the electric characteristics of the transistor similarly to the case of removing the reaction product.
SUMMARY OF THE INVENTION
The present invention has been proposed in order to solve the aforementioned problems, and an object thereof is to provide a method of fabricating a semiconductor device attaining high selectivity in etching. Another object of the present invention is to provide a wafer treatment apparatus employed for such a method of fabricating a semiconductor device. Still another object of the present invention is to provide a semiconductor device obtained by such a method of fabricating a semiconductor device.
A method of fabricating a semiconductor device according to a first aspect of the present invention comprises a wafer treatment step performing prescribed treatment on a first part having a prescribed etching property and a second part having an etching property different from the prescribed etching property, which are formed on a semiconductor substrate, in a chamber with gas for etching. The wafer treatment step includes an etching gas supply step of introducing the gas for etching into the chamber. Assuming that a time between introduction of the gas for etching into the chamber and starting of etching of the first part is referred to as a first starting time and a time between introduction of the gas for etching into the chamber and starting of etching of the second part is referred to as a second starting time longer than the first starting time, a time for carrying out the etching gas supply step is longer than the first starting time and shorter than the second starting time.
According to this method, the time for carrying out the etching gas supply step is longer than the first starting time
Ootera Hiroki
Shintani Kenji
Taki Masakazu
Tsuda Mutsumi
Chen Kin-Chan
Mitsubishi Denki & Kabushiki Kaisha
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