Method of fabricating a semiconductor device having silicide lay

Details Method of fabricating a semiconductor device having silicide lay Method of fabricating a semiconductor device having silicide lay

1995-06-02

1997-03-04

Nguyen, Tuan H.

Fishing, trapping, and vermin destroying

437 34, 437 59, 437162, 437200, 148DIG9, H01L 21265

Patent

active

056078668

ABSTRACT:
In a method of fabricating a semiconductor device having a MISFET and/or bipolar transistor and/or a resistor formed with different surface portions of a single silicon semiconductor substrate in which a silicide layer is formed on each of source/drain regions of the MISFET and/or collector contact region and extrinsic base region of the bipolar transistor and/or contact regions of the resistor, the bipolar transistor has its emitter region formed by diffusing an impurity contained in doped polysilicon film serving as an emitter electrode of the bipolar transistor into a part of its base region. The resistor may have a resistive region formed in a surface portion of the substrate and may be covered with an insulating film and a doped polysilicon film thereon or may have a doped polysilicon film formed over a surface portion of the substrate as a resistor element. These doped polysilicon films in the resistor are films which are formed in the same step as that for the doped silicon film serving as the emitter electrode in the bipolar transistor. Each of the doped polysilicon film in the bipolar transistor and that in the resistor are covered with an insulating film before a refractory metal film is formed over a whole surface of the substrate to prevent formation of silicide films on the doped polysilicon films in the bipolar transistor and resistor.

REFERENCES:
patent: 5045493 (1991-09-01), Kameyama et al.
patent: 5075241 (1991-12-01), Spratt et al.
patent: 5196356 (1993-03-01), Won et al.
patent: 5441903 (1995-08-01), Eklund
patent: 5455189 (1995-10-01), Grubisich

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