Fishing – trapping – and vermin destroying
Patent
1993-06-16
1994-07-19
Quach, T. N.
Fishing, trapping, and vermin destroying
437192, 437193, H01L 21283
Patent
active
053309340
ABSTRACT:
A contact hole in a diffusion region is narrowed by a buffer layer formed at about the middle of an interlayer insulating film in its thickness direction. This buffer layer serves as effective alignment tolerances to the diffusion region and a contact electrode at the time of forming the contact hole. The structure having a wiring conductor filled in the contact hole and having the contact electrode formed on this wiring conductor can assure a highly reliable contact. Forming a buffer layer as a sidewall on this contact electrode and a first wiring layer formed on the same layer can assure an effective alignment tolerance to the first wiring layer at the time of forming a via hole. Filling a wiring conductor in the via hole can eliminate the need for any contact tolerance for a second wiring layer to be formed on this wiring conductor. Accordingly, the individual contact tolerances can be assured by self-alignment.
REFERENCES:
patent: 4619037 (1986-10-01), Taguchi et al.
patent: 4641170 (1987-02-01), Ogura et al.
patent: 4866009 (1989-09-01), Matsuda
patent: 4874719 (1989-10-01), Kurosawa
patent: 4878105 (1989-10-01), Hirakawa et al.
patent: 4962414 (1990-10-01), Liou et al.
patent: 5204286 (1993-04-01), Doan
Ikeda Naoki
Shibata Hideki
Kabushiki Kaisha Toshiba
Quach T. N.
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