Metal treatment – Compositions – Heat treating
Patent
1979-08-23
1981-05-19
Ozaki, G.
Metal treatment
Compositions
Heat treating
148187, 29571, 357 42, H01L 2126
Patent
active
042683211
ABSTRACT:
A method of fabricating complementary insulated gate field effect transistors of LOCOS (Local Oxide of Silicon) construction comprising the steps of selectively forming an SiO.sub.2 film on an N type semiconductor substrate, introducing P type impurities in the substrate through the substrate surface which is not covered with the SiO.sub.2 film so as to form a P type well region, selectively forming Si.sub.3 N.sub.4 films on the P type well region, introducing P type impurities in the P type well region through the region surface which is not covered with the Si.sub.3 N.sub.4 film to form a P.sup.+ type channel stopper, and selectively forming a field oxide film on the P.sup.+ type channel stopper by using the Si.sub.3 N.sub.4 film as the oxide mask. The method can also include steps for forming an N.sup.+ type channel stopper under the field oxide film.
REFERENCES:
patent: 3913211 (1975-10-01), Seeds et al.
patent: 3983620 (1976-10-01), Spadea
patent: 4027380 (1977-06-01), Deal
patent: 4047285 (1977-09-01), Spadea
patent: 4081896 (1978-04-01), Dingwall
patent: 4110899 (1978-05-01), Nagasawa et al.
patent: 4170492 (1979-10-01), Bartlett et al.
IBM Tech. Discl. Bull., vol. 16, No. 5, Oct. 1973, pp. 617 and 617a.
Hitachi , Ltd.
Ozaki G.
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