Fishing – trapping – and vermin destroying
Patent
1992-02-28
1993-10-12
Hearn, Brian E.
Fishing, trapping, and vermin destroying
437133, 437228, 437909, 148DIG11, 148DIG72, H01L 21265
Patent
active
052525007
ABSTRACT:
There is provided a method of fabricating a semiconductor device. This method includes the steps of: forming a collector layer, a base layer, an emitter layer, and a dummy layer; patterning the dummy layer and the emitter layer into a mesa structure; forming a base electrode on the base layer in self-alignment to the mesa structure, and simultaneously forming a base electrode material on the dummy layer; forming a surface planarization film on the base layer to cover sides of the mesa structure; and removing the base electrode material and the dummy layer. The removal of the dummy layer is performed by subjecting the dummy layer to an etchant through an opening in the base electrode material.
REFERENCES:
patent: 4593457 (1986-06-01), Birrittella
patent: 4954457 (1990-09-01), Jambotkar
patent: 5093272 (1992-03-01), Hoepfner et al.
Masanori Inada et al, "AlGaAs/GaAs Heterojunction Bipolar Transistors with Small Size Fabricated by a Multiple Self-Alignment Process Using One Mask" IEEE Transactions on Electron Devices, vol. ED-34, No. 12, Dec. 1987, pp. 2405-2411.
Hearn Brian E.
Nguyen Tuan
Sharp Kabushiki Kaisha
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