Method of fabricating a semiconductor device

Details Method of fabricating a semiconductor device Method of fabricating a semiconductor device

1988-10-31

1990-03-27

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 57, 357 43, H01L521364, H01L 2706

Patent

active

049120557

ABSTRACT:
A method for fabricating a BiCMOS device to achieve a maximum performance through a of minimum processing steps, in which the BiCMOS device is exemplary for its high integration and high performance MOS transistors, self-aligned metal contact emitter type bipolar transistors having high load driving force, high performance matching characteristics and high integration, and self-aligned polycrystalline silicon emitter type bipolar transistors having high integration and high speed characteristics in low current, thereby being used in high integration, high speed digital and precise analog system. The method includes a plurality of fabrication steps including ion-implantation, formation of a thin film oxide layer, deposition of a nitride layer, etching of the oxide layer, formation of windows and others, alternately and/or sequentially in a single chip substrate.

REFERENCES:
patent: 4403395 (1983-09-01), Curran
patent: 4475279 (1984-10-01), Gable
patent: 4484388 (1984-11-01), Iwasaki
patent: 4637125 (1987-01-01), Iwasaki et al.
patent: 4760033 (1988-07-01), Mueller
"Bipolar Device Incorporated into CMOS Technology", IBM Technical Disclosure Bulletin, vol. 28, No. 9, pp. 3813-3815, Feb. 1986.

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