Method of fabricating a self-cascoding CMOS device

Details Method of fabricating a self-cascoding CMOS device Method of fabricating a self-cascoding CMOS device

1995-03-16

1996-10-15

Fourson, George

Fishing, trapping, and vermin destroying

437 34, 437 45, 437 56, 437 58, H01L 2170

Patent

active

055653758

ABSTRACT:
A self-cascoding transconductance circuit has cascoding and current sink/source FETs, serially connected with their gates tied together to receive an input voltage, wherein the cascoding FET has a threshold voltage having an absolute value at least 0.1 volts less than that of the current sink/source FET to ensure that the current sink/source FET operates in its saturated region. A CMOS structure implementing the self-cascoding transconductance circuit has two doped threshold adjust regions formed beneath a gate electrode such that the two doped threshold adjust regions respectively effectuate the cascode and current sink/source FETs which then share the gate electrode. A method of forming the CMOS structure includes forming two self-cascoding transconductance circuits electrically connected in parallel such that they share a common drain region between their respective gate electrodes, and each has one source region. By forming the two self-cascoding transconductance circuits in such a fashion, the effect of alignment errors contributed by each of the parallel connected self-cascoding transconductance circuits is cancelled out for the combined circuit.

REFERENCES:
patent: 3653978 (1977-04-01), Robinson et al.
patent: 4814839 (1989-03-01), Nishizawa et al.
patent: 4981810 (1991-01-01), Fazan et al.
patent: 4992389 (1991-02-01), Ogura et al.
patent: 4996167 (1991-02-01), Chen
Allen et al., "CMOS Analog Circuit Design," Holt, Reinhart and Winston, Inc., Fort Worth, pp. 413-414 (1987).
Masuda et al., "CMOS Sampled Differential Push-Pull Cascose Operational Amplifier," IEEE, pp. 1211-1214 (1984).
Geiger et al., "VLSI Design Techniques for Analog and Digital Circuits," McGraw-Hill New York, pp. 414-427 (1990).

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