Method of fabricating a raised source/drain transistor

Details Method of fabricating a raised source/drain transistor Method of fabricating a raised source/drain transistor

1990-08-16

1992-01-07

Chaudhuri, Olik

Fishing, trapping, and vermin destroying

437 41, 437162, H01L 21336

Patent

active

050791800

ABSTRACT:
A raised source/drain transistor is provided having thin sidewall spacing insulators (54) adjacent the transistor gate (48). A first sidewall spacer (64) is disposed adjacent thin sidewall spacing insulator (54) and raised source/drain region (60). A second sidewall spacer (66) is formed at the interface between field insulating region (44) and raised source/drain region (60).

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