Method of fabricating a programmable polysilicon gate array base

Details Method of fabricating a programmable polysilicon gate array base Method of fabricating a programmable polysilicon gate array base

1996-03-08

1997-11-25

Tsai, Jey

Fishing, trapping, and vermin destroying

437 50, 437 51, 437250, H01L 21265

Patent

active

056912188

ABSTRACT:
A gate array is disclosed having a programmable polysilicon layer which serves as both the gate electrodes for MOS transistors and routing lines for some connections between gate electrodes. The gate array structure is formed on a semiconductor substrate and has an array of identical base cells located in a core region of the structure. Each such base cell includes the following elements: (1) a plurality of transistors, each of which includes a gate electrode; and (2) one or more gate connection strips formed on the substrate and electrically connecting selected gate electrodes of two or more of the transistors. Preferably, the gate connection strips are made from the same material as the selected gate electrodes (e.g., polysilicon) and are integrally connected therewith. The gate connection strips may patterned (i.e., programmed) to form substrate level routing between gates of various transistors.

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