Method of fabricating a programmable function system block using

Details Method of fabricating a programmable function system block using Method of fabricating a programmable function system block using

1996-07-25

1999-01-05

Bowers, Jr., Charles L.

Semiconductor device manufacturing: process

Making device array and selectively interconnecting

Using structure alterable to conductive state

438467, 438530, 438351, H01L 2170

Patent

active

058562133

ABSTRACT:
An antifuse structure is formed between two metal contacts in which a thin oxide layer is formed on the first or bottom metal, a shallow via is provided oxide layer and a layer of amorphous silicon is deposited over the thin oxide and into the shallow via without leaving the usual furrows in the amorphous silicon and thereby eliminating the step coverage problems of cusps forming in the subsequently applied second or top metal.

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patent: 5290734 (1994-03-01), Boardman et al.
patent: 5328868 (1994-07-01), Conti et al.
patent: 5633189 (1997-05-01), Yen et al.
Conducting Filament of the Programmed Metal Electrode Amorphous Silicon Antifuse, Kathryn E. Gordon and Richard J. Wong, pp. IEDM 93-27 thru -30-IEDM 93.
Developments in Non-Volatile FPGAs, Electronic Engineering, Apr. 1993, pp. 43, 45 and reference page.

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