Method of fabricating a programmable array

Coating processes – Electrical product produced – Integrated circuit – printed circuit – or circuit board

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365100, 365163, B05D 512, G11C 1700, G11C 1100

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active

047956577

ABSTRACT:
There is disclosed a thin film photoprogrammable memory array with a substantially increased resistance associated with each cell of the array. First and second sets of orthogonally oriented address lines are formed on a substrate with the first set of address lines crossing the second set of address lines at insulated cross-overs. A plurality of amorphous silicon diodes are deposited on the members of the first set of address lines adjacent the insulated cross over points. Settable memory material, an optically programmable chalcogenide, is deposited in electrical contact with each of the amorphous silicon diodes and in electrical contact with a member of the second set of address lines adjacent the cross-over region. When the settable memory material has been set to its high conductivity state, the electrical resistance between the amorphous silicon diode and the adjacent member of the second set of address lines is proportional to an effective electrical length measured along the settable storage member. A method of making the improved array is also disclosed. In a preferred embodiment the array is made on a flexible substrate made of a synthetic polymeric resin.

REFERENCES:
patent: 3271591 (1966-09-01), Ovshinsky
patent: 3530441 (1970-09-01), Ovshinsky
patent: 3629863 (1971-12-01), Neale
patent: 3699543 (1972-10-01), Neale
patent: 3827033 (1974-07-01), Quilliam
patent: 4203123 (1980-05-01), Shanks
patent: 4226878 (1980-10-01), Ovshinsky et al.
David et al "IEEE Trans. on Computers", vol. C-17, No. 8, Aug. 1968, pp. 721-728.

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