Fishing – trapping – and vermin destroying
Patent
1989-02-16
1989-11-14
Hearn, Brian E.
Fishing, trapping, and vermin destroying
437200, 437192, 357 237, 148DIG147, H01L 21265
Patent
active
048807532
ABSTRACT:
In a process for manufacturing a thin film transistor, a first polysilicon layer is formed on a substrate and a silicon dioxide layer is formed on a region of the first polysilicon layer leaving exposed regions of that layer. A second polysilicon layer is formed on the silicon dioxide layer and aligned therewith. Regions of a selectively-grown electrically-conductive film are deposited on the second polysilicon layer and on the exposed regions of the first polysilicon layer, the film being such that it wil not grow on the edges of the silicon dioxide layer, but will grow on the exposed polysilicon to form gate, source and drain electrodes. The edges of the silicon dioxide layer therefore remain uncoated. The film may be formed of tungsten or may be formed, for example, by selective silicon epitaxy, phosphorus doped.
REFERENCES:
patent: 4631563 (1986-12-01), Iizuka
patent: 4675713 (1987-06-01), Terry et al.
patent: 4727044 (1988-02-01), Yamazaki
patent: 4755865 (1988-07-01), Wilson et al.
patent: 4772927 (1988-09-01), Saito et al.
patent: 4814842 (1989-03-01), Nakagawa et al.
patent: 4823180 (1989-04-01), Wieder et al.
Meakin Douglas B.
Migliorato Piero
Hearn Brian E.
The General Electric Company p.l.c.
Wilczewski M.
LandOfFree
Method of fabricating a polysilicon thin film transistor does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of fabricating a polysilicon thin film transistor, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of fabricating a polysilicon thin film transistor will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1852770