Method of fabricating a packaging structure

Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Making plural separate devices

Reexamination Certificate

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Details

C438S108000, C438S109000, C438S110000, C438S125000, C438S126000, C257S723000, C257S778000, C257SE23169, C257SE23173, C257SE21506, C257SE21511, C257SE21523

Reexamination Certificate

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08058105

ABSTRACT:
A method of fabricating a packaging structure includes cutting a panel of packaging substrate into a plurality of packaging substrate blocks each having a plurality of packaging substrate units; mounting and packaging a semiconductor chip on each of the packaging substrate unit to form package blocks each having multiple packaging structure units; and cutting package blocks to form a plurality of package units. In the method, the alignment difference between the packaging structure units in each package block is minimized by appropriately cutting and forming substrate blocks to achieve higher precision and better yield, and also packaging of semiconductor chips can be performed on all package units in the substrate blocks, thereby integrating fabrication with packaging at one time to improve production efficiency and reduce the overall costs as a result.

REFERENCES:
patent: 6607940 (2003-08-01), Yasunaga
patent: 7045392 (2006-05-01), Hashimoto
patent: 2005/0133895 (2005-06-01), Ujiie et al.
patent: 2005/0167830 (2005-08-01), Chang et al.
patent: 2006/0192287 (2006-08-01), Ogawa et al.
patent: 2006/0223236 (2006-10-01), Nomura et al.
patent: 2008/0191326 (2008-08-01), Lin et al.

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