Fishing – trapping – and vermin destroying
Patent
1995-04-24
1996-09-10
Wilczewski, Mary
Fishing, trapping, and vermin destroying
437 21, 437 44, 437 52, 437913, H01L 21336
Patent
active
055545483
ABSTRACT:
A method is provided for forming a thin film transistor of a semiconductor integrated circuit, and an integrated circuit formed according to the same. A polysilicon gate electrode is formed over a portion of the integrated circuit. Agate oxide layer is formed over the gate electrode. A conformal polysilicon layer is formed over the gate oxide layer and a portion of the integrated circuit. The polysilicon layer is doped with an n-type dopant to form a channel region over the gate electrode. A screen oxide layer is formed over a portion of the polysilicon layer substantially over the gate electrode. The polysilicon layer not covered by the screen oxide layer is doped with a p.sup.- -type dopant to form a lightly doped drain region on each side of the channel region. A photoresist layer is formed over a portion of the screen oxide layer and one of the lightly doped drain regions. The polysilicon layer not covered by the photoresist layer is doped with a p.sup.+ -type dopant. The photoresist layer is then removed. A conformal oxide layer is formed over the integrated circuit. The conformal oxide layer is then patterned and etched to form sidewall spacers on the sides of the screen oxide layer and the polysilicon layer adjacent to the screen oxide layer. The polysilicon layer not covered with the screen oxide layer or the sidewall oxide spacers is doped with a p.sup.+ -type dopant. The screen oxide layer and the sidewall oxide spacers are then removed.
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Jorgenson Lisa K.
SGS-Thomson Microelectronics Inc.
Wilczewski Mary
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