Method of fabricating a monolithic integrated circuit structure

Metal working – Method of mechanical manufacture – Assembling or joining

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29576B, 29576E, 29576W, 29578, 148 15, 148175, 148187, 357 20, 357 40, 357 48, 357 91, H01L 2131, H01L 21318

Patent

active

044160550

ABSTRACT:
Method of fabricating monolithic integrated circuit structure incorporating a bipolar transistor and a high value resistor. First and second N-type sectors are formed in an N-type epitaxial layer by junction isolation. A silicon oxide layer is formed on the surface of the body. The layer is thinner over a part of the first sector and over a part of the second sector. A layer of silicon nitride is formed on portions of the thinner silicon oxide to overlie predetermined zones within each sector. P-type conductivity imparting material is ion implanted through the unprotected thinner silicon oxide to form a low resistivity region in the first sector and two low resistivity regions in the second sector. The layer of silicon nitride overlying the predetermined zone in the second sector is removed, and an opening is formed over the predetermined zone in the second sector. P-type conductivity imparting material is ion implanted through the opening to form a resistor in the predetermined zone of the second sector with the two low resistivity regions providing contact regions at opposite ends thereof. The thickness of the silicon oxide layer is increased except over the predetermined zone of the first sector where it is protected by the remaining silicon nitride layer. The silicon nitride and the underlying silicon oxide are removed exposing the predetermined zone in the first sector. N-type and P-type conductivity imparting materials are ion implanted in the predetermined zone to complete the structure.

REFERENCES:
patent: 3717507 (1973-02-01), Abe
patent: 3885999 (1975-05-01), Fusaroli et al.
patent: 3918997 (1975-11-01), Mohsen et al.
patent: 3959040 (1976-05-01), Robertson
patent: 4021270 (1977-05-01), Hunt et al.
patent: 4231819 (1980-11-01), Raffel et al.
Yau et al., "Fabrication of a Low-Noise . . . Bipolar Transistor . . . " IEEE Trans. on Electron Dev., vol. ED-25, No. 4, Apr. 1978, pp. 413-419.
Archer, J. R., "Low-Noise Implanted-Base Microwave Transistors" Solid-State Electronics, vol. 17, 1974, pp. 387-393.

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