Method of fabricating a microelectronic package having polymer E

Details Method of fabricating a microelectronic package having polymer E Method of fabricating a microelectronic package having polymer E

1997-09-25

1999-10-19

Chaudhuri, Olik

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Metallic housing or support

438124, 438126, 438140, H01L 2160, H01L 2156, H01L 2974, H01L 2362

Patent

active

059703210

ABSTRACT:
A semiconductor package having positioned therein a protection layer which protects the integrated circuit chip from electrostatic discharge (ESD) damage. The protection layer is made of a material that has at steady state a high electrical resistance, but when a high ESD potential is applied to it, it becomes highly conductive. A preferred material is SurgX.TM., which is a polymer. The layer is positioned to shunt the potential away from the chip, and can be positioned operatively between a signal lead and a power plane or between different signal leads. That is, the protection layer can be sandwiched between the lead and the conductive member, or the lead can be within the layer. Another preferred construction incorporates the protection material in a tape construction as a thin layer sandwiched between and bonded to a layer of leads and a ground plane.

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