Method of fabricating a MESFET transistor with gate spaced above

Details Method of fabricating a MESFET transistor with gate spaced above Method of fabricating a MESFET transistor with gate spaced above

1988-10-24

1989-10-03

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437912, 437927, 437944, 357 22, 148DIG142, H01L 2348

Patent

active

048716871

ABSTRACT:
In a Schottky field effect MESFET transistor including a semiconductor substrate and source, gate and drain electrodes, the electrical resistance of the gate is reduced to substantially zero by implementing the gate electrode as a sheet of metallization which bypasses a portion of the source electrode and which is spaced from the source electrode by a layer of air or the like. The MESFET transistor may be fabricated by providing drain and source electrodes on a semiconductor substrate with the electrodes situated side-by-side. Photoresist is applied over at least the source electrode while leaving exposed (a) a first portion of the substrate surface between the source and drain electrodes and (b) a second portion of the substrate surface situated on an opposite side of the source electrode and which is used as a bonding pad location. Gate metallization is then formed over the photoresist and in contact with the first and second areas of the substrate surface. The metallization may also extend over the drain electrode that is later removed. Upon removal of the photoresist from between the gate and source electrodes, a layer of air of the like dielectrically separates these electrodes from each other. A portion of the gate metallization that overlies the drain electrode may exist as a tail that may have various lengths to make possible a non-critical patterning step for the gate metallization.

REFERENCES:
patent: 3647585 (1972-03-01), Fritzinger et al.
patent: 4054484 (1977-10-01), Lesh et al.
patent: 4107720 (1978-08-01), Pucel et al.

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