Method of fabricating a low voltage zener-triggered SCR for ESD

Details Method of fabricating a low voltage zener-triggered SCR for ESD Method of fabricating a low voltage zener-triggered SCR for ESD

1996-03-04

1999-01-05

Wilczewski, Mary

Semiconductor device manufacturing: process

Making regenerative-type switching device

438237, 438564, 438983, 148DIG174, 257112, 257356, 257357, H01L 2138, H01L 21385, H01L 2360

Patent

active

058562141

ABSTRACT:
The method in accordance with the present invention is compatible with conventional CMOS fabrication processes to form a zener diode and a lateral silicon controlled rectifier constituting an on-chip ESD protection circuit in a semiconductor substrate. The zener diode is composed of a p-type doped region and an n-type doped region, wherein one of the doped regions, formed by deep diffusing impurities from a doped polysilicon layer, is arranged between two adjacent well regions. During an ESD event, the zener diode incurs breakdown to lower the trigger voltage of the lateral SCR device to within a range of about 5-7 Volts to thereby discharge the ESD current prior to damage of an internal circuit being protected.

REFERENCES:
patent: 4835111 (1989-05-01), Wright et al.
patent: 5166089 (1992-11-01), Chen et al.
patent: 5602404 (1997-02-01), Chen et al.

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