Method of fabricating a low-inductance in-line resistor for supe

Details Method of fabricating a low-inductance in-line resistor for supe Method of fabricating a low-inductance in-line resistor for supe

1997-09-16

2000-04-18

Fahmy, Wael

Semiconductor device manufacturing: process

Having superconductive component

438923, 257661, 257663, H01L 2100

Patent

active

06051440&

ABSTRACT:
A method of fabricating a low-inductance, in-line resistor includes the steps of: depositing a superconductive layer 12 on a base layer 14; patterning an interconnect region 16 on the superconductive layer 12; and converting the interconnect region 16 of the superconductive layer 12 to a resistor material region 18. The resistor region 18 and the superconductive layer 12 are substantially in the same plane. The method can further include the steps of depositing a conductive layer 22 on the resistor region 18 and on the photo-resist layer 20, and lifting off the photo-resist layer 20 to leave the conductive layer 22 on the resistor region 18. As such, the conductive layer 22 provides a low sheet resistivity for the resistor region 18. In another embodiment, the method includes the steps of: depositing in-situ a superconductive layer 12 on a base layer 14; depositing in-situ a conductive layer 22 on the superconductive layer 12 to form a bi-layer 24; patterning an interconnect region 16 on the bi-layer 24; and converting the interconnect region 16 of the bi-layer 24 to a resistor material region 18.

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