Method of fabricating a highly conductive structure

Details Method of fabricating a highly conductive structure Method of fabricating a highly conductive structure

1981-09-21

1983-08-16

Ozaki, G.

Metal working

Method of mechanical manufacture

Assembling or joining

29591, 357 67, 427 88, H01L 21285

Patent

active

043983413

ABSTRACT:
An improved method of fabricating a silicide structure includes depositing a metal, e.g., molybdenum or tungsten, directly onto a thin insulating layer of silicon dioxide and/or silicon nitride formed on a semiconductor substrate, co-depositing the metal and silicon onto the metal layer and then depositing silicon onto the co-deposited metal-silicon layer. This structure is annealed at a temperature sufficient to form a metal silicide between the thin insulating layer and the layer of silicon. The silicon layer serves as a source of silicon for the metal layer which is consumed during the annealing step to form, along with the co-deposited metal-silicon layer, a relatively thick metal silicide layer directly on the thin silicon dioxide layer. A sufficiently thick silicon layer is initially provided on the co-deposited metal-silicon layer so that a portion of the initial silicon layer remains after the annealing step has been completed. This excess silicon may be oxidized to form a passivating layer on top of the thick metal silicide layer. If all or a part of the silicon in the remaining silicon layer after annealing is removed, the thick metal silicide layer may be exposed to an oxidizing ambient for self-passivation. In this latter instance, the pure metal precipitates in the silicide resulting in a line with even greater conductivity than a pure silicide line, which is very desirable for interconnections.

REFERENCES:
patent: 3617824 (1971-11-01), Shinoda et al.
patent: 4128670 (1978-12-01), Gaensslen
patent: 4180596 (1979-12-01), Crowder et al.
patent: 4263058 (1981-04-01), Brown et al.
patent: 4285761 (1981-08-01), Fatula et al.
patent: 4329706 (1982-05-01), Crowder et al.
P. Ho et al., IBM Technical Disclosure Bulletin, vol. 21, No. 12, May 1979, pp. 5039-5040, "Method for Obtaining Large Grain Silicon Films on Amorphous Substrate".
T. Mochizuki et al., Japanese Journal of Applied Physics, vol. 17, 1978 Supplement 17-1, pp. 37-42, "A New MOS Process Using MoSi.sub.2 as a Gate Material".
Laibowitz et al., IBM Technical Disclosure Bulletin, vol. 21, No. 2, May 1979, pp. 5051 and 5052.

Affiliated with

Also associated with

Rating

Method of fabricating a highly conductive structure does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method of fabricating a highly conductive structure, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of fabricating a highly conductive structure will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-807989