Method of fabricating a complementary bipolar junction...

Semiconductor device manufacturing: process – Forming bipolar transistor by formation or alteration of... – Complementary bipolar transistors

Reexamination Certificate

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C438S340000

Reexamination Certificate

active

06930008

ABSTRACT:
A method of fabricating a complementary bipolar junction transistor includes forming a polycrystalline silicon layer on an NPN bipolar junction transistor region and a PNP bipolar junction transistor region, respectively implanting an N-type impurity and a P-type impurity into the polycrystalline silicon layer, and then diffusing to respectively form an N-type emitter region and a P-type emitter region within a P-type base region and an N-type base region. By patterning the polycrystalline silicon layer, an N-type emitter electrode and a P-type emitter electrode are simultaneously formed. The polycrystalline silicon layer is used for simultaneously forming the N-type emitter electrode of the NPN bipolar junction transistor and the P-type emitter electrode of the PNP bipolar junction transistor by a single depositing and etching process.

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patent: 2003152094 (2003-05-01), None
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patent: 1020020086450 (2002-08-01), None

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