Fishing – trapping – and vermin destroying
Patent
1988-04-20
1989-10-10
Hearn, Brian E.
Fishing, trapping, and vermin destroying
437 33, 437162, 437233, 148DIG10, 148DIG11, 357 34, H01L 21265
Patent
active
048732001
ABSTRACT:
A method of fabricating a bipolar transistor on a semiconductor substrate capable of operating at a high operating speed and formed in a compact construction. A first polycrystalline silicon layer is oxidized selectively to form areas for forming base electrodes and a collector electrode. Boron is implanted into the polycrystalline silicon layer in a high concentration to form the base electrodes, the silicon dioxide film is removed to form an opening from a region for forming an emitter, the side wall of the opening is oxidized, an inactive base is formed in the polycrystalline silicon layer, active base is formed in the inactive base by implanting boron in the inactive base. Then, the entire surface of the device is coated with an oxide film and a second polycrystalline silicon layer. The polycrystalline silicon layer and the oxide film are removed selectively through a reactive ion etching process to leave the second polycrystalline silicon layer only over the side wall of an opening through which an emitter is exposed. A third polycrystalline silicon layer is then formed over the entire surface and arsenic is diffused in the third polycrystalline silicon layer to form the emitter, and then a silicide film is formed over the surface of the third polycrystalline silicon layer.
REFERENCES:
patent: 4495010 (1985-01-01), Kranzer
patent: 4731341 (1988-03-01), Kawakatsu
patent: 4783422 (1988-11-01), Kawakatsu
patent: 4812417 (1989-03-01), Hirao
Hearn Brian E.
McAndrews Kevin
OKI Electric Industry Co., Ltd.
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