Method of fabricating a bipolar semiconductor device with silici

Details Method of fabricating a bipolar semiconductor device with silici Method of fabricating a bipolar semiconductor device with silici

1987-09-14

1989-02-07

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437200, 437233, 437193, 437228, 148DIG10, 148DIG11, 357 34, H01L 21265

Patent

active

048031755

ABSTRACT:
A method for making a bipolar semiconductor device having silicide contacts which is compatible with the processing steps used in the fabrication of MOS devices. The present invention includes the use of sidewall spacers to limit the self-aligned implants of the extrinsic base and the silicide contact. The device is annealed so that the diffusion of the polysilicon layer which forms the emitter may be controlled. Since the emitter size may be controlled, the emitter to base contact area may be reduced resulting in improved device performance.

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patent: 4698127 (1987-10-01), Hideshima
patent: 4705599 (1987-11-01), Suda et al.

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