Method of fabricating a bi-CMOS device

Details Method of fabricating a bi-CMOS device Method of fabricating a bi-CMOS device

1990-01-26

1990-10-23

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 34, 437 56, 437162, 437 32, 148DIG123, 148DIG124, H01L 21331, H01L 21335

Patent

active

049652168

ABSTRACT:
A process for fabricating a CMOS compatible bipolar transistor is described. The transistor, which is of the polysilicon emitter type, is fabricated by forming a p-type layer in a well, providing a polysilicon emitter in contact with the layer, using the emitter as a mask to implant p.sup.+ -type base contact regions, and applying contacts to the device.

REFERENCES:
patent: 3817794 (1974-06-01), Beadle et al.
patent: 3951693 (1976-04-01), Fisher et al.
patent: 4188707 (1980-02-01), Asano et al.
patent: 4398962 (1983-08-01), Kanazawa
patent: 4484388 (1984-11-01), Iwasaki
Cuthberson, A. et al., IEEE IEDM Tech. Digest, 1984, pp. 749-752.
Colclaser, Microelectronics: Processing and Device Design, John Wiley & Sons, 1980, pp. 212-217.

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