Method of extracting a semiconductor device compact model

Details Method of extracting a semiconductor device compact model Method of extracting a semiconductor device compact model

2005-06-11

2009-11-24

Rodriguez, Paul (Department: 2123)

Data processing: structural design, modeling, simulation, and em

Modeling by mathematical expression

C716S030000, C716S030000, C716S030000, C716S030000, C702S057000, C702S065000

Reexamination Certificate

active

07623995

ABSTRACT:
This invention is a method of extracting a semiconductor device compact model by using knowledge of the equations used inside the compact model. Starting by fitting a small subset of the model parameters, the remaining model parameters are fitted and as each new subset of model parameters are fitted, the previously fitted model parameters are adjusted to compensate for the changes introduced due to the currently optimized parameters. This invention details the method of making these adjustments.

REFERENCES:
patent: 6314390 (2001-11-01), Bittner
patent: 6397172 (2002-05-01), Gurney
patent: 6560568 (2003-05-01), Singhal
patent: 6779157 (2004-08-01), Kondo
patent: 2005/0267851 (2005-12-01), Baba et al.
Josef Watts, Calvin Bittner, Douglas Heaberlin, James Hoffmann, “Extraction of Compact Model Parameters for ULSI MOSFETS Using a Genetic Algorithm” 1999, IBM Microelectronics, Essex Junction, VT USA, University of Vermont, Burlington, VT, 4 pages un-numbered.

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