Method of extending capacity of a microprocessor timer

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364270, 3642701, 3642702, 364DIG1, 395557, G06F 114

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active

055727204

ABSTRACT:
A timer unit of a microprocessor has a hardware timer limited to the size of its register, and microcode instructions in the timer unit increment a second register when the timer register rolls over to a clear state. The contents of the two registers are concatenated to obtain an extended timer value. A delay in processing the increment of the second register can cause non-coherency of the two registers. By setting a flag when the increment occurs and detecting from the hardware register value whether rollover has occurred, it is logically decided from the flag and the rollover information whether the registers are non-coherent and if so, a correction is made in the value used from one of the registers.

REFERENCES:
patent: 5058050 (1991-10-01), Ogita
patent: 5233573 (1993-08-01), Bettelheim et al.
patent: 5301335 (1994-04-01), Langan et al.
patent: 5325341 (1994-06-01), Viot et al.

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