Method of exposing a semiconductor wafer in an exposer

Details Method of exposing a semiconductor wafer in an exposer Method of exposing a semiconductor wafer in an exposer

2005-05-24

2005-05-24

Young, Christopher G. (Department: 1756)

Radiation imagery chemistry: process, composition, or product th

Registration or layout process other than color proofing

C430S312000, C430S314000, C430S316000, C430S317000, C430S318000

Reexamination Certificate

active

06896999

ABSTRACT:
A method for exposing a semiconductor wafer in an exposer includes applying a first resist layer on a layer covering an alignment mark. A microscope measuring instrument, which has a visible and an ultraviolet light source, uses the visible light source for aligning the wafer and uses the ultraviolet light source for exposing a region in the first resist layer above the alignment mark without using a mask to free expose the alignment marks. The semiconductor wafer is then developed, the alignment mark is etched free and covered again with a second resist, which is exposed in an exposer in order to transfer a mask structure following an alignment with the alignment mark. The capacity of expensive exposers is thus advantageously increased, and microscope measuring instruments can be used multifunctionally, for example for the free exposure and for the detection of defects.

REFERENCES:
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patent: 5757480 (1998-05-01), Shimanaka
patent: 5968687 (1999-10-01), Chang et al.
patent: 6190836 (2001-02-01), Grenon et al.

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