Method of etching silicon wafer and silicon wafer

Details Method of etching silicon wafer and silicon wafer Method of etching silicon wafer and silicon wafer

1998-07-23

2001-09-04

Utech, Benjamin L. (Department: 1765)

Semiconductor device manufacturing: process

Chemical etching

Liquid phase etching

C438S749000, C438S750000, C438S753000, C438S756000, C257S419000, C257S420000

Reexamination Certificate

active

06284670

ABSTRACT:

CROSS REFERENCE TO RELATED APPLICATION
This application is based upon and claims the benefit of priority of Japanese Patent Applications No. H.9-197054 filed on Jul. 23, 1997, No. H.10-157916 filed on Jun. 5, 1998, and No. H.10-157917 filed on Jun. 5, 1998, the contents of which are incorporated herein by reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method of etching silicon (Si) wafer preferable in forming an Si diaphragm used for a semiconductor pressure sensor, a semiconductor acceleration sensor or the like and relates to an Si wafer having a diaphragm of an octagonal shape.
2. Description of Related Art
An explanation will be given of a conventional method of forming an Si diaphragm used for a semiconductor pressure sensor, a semiconductor acceleration sensor or the like in reference to
FIGS. 56 and 57
. First, as shown in
FIG. 56
, gages (strain gages)
2
having a predetermined shape are formed on a lower face of an Si wafer
1
. Further, an etching mask
3
composed of SiO
2
or SiN is formed on an upper face of the Si wafer
1
. Successively, as shown in
FIG. 57
, the lower face side of the Si wafer
1
is pasted on a ceramic substrate
5
via a protecting member
4
of wax or the like. Thereby, the lower face side of the Si wafer
1
is protected.
As shown by
FIG. 57
, the Si wafer
1
and the ceramic substrate
5
are immersed in an anisotropic etching solution composed of, for example, an aqueous solution of KOH stored in a vessel
6
to thereby carry out chemical etching. In this case, a plurality of sheets of the Si wafers
1
(as well as the ceramic substrates
5
) are set in a carrier
8
and immersed into the anisotropic etching solution
7
along with the carrier
8
.
When the Si wafer
1
is immersed into the anisotropic etching solution
7
, as shown by two-dotted chain lines in
FIG. 56
, etching faces in correspondence with opening portions
3
a
of the etching mask
3
are dissolved, and recess portions
9
are formed. Further, the bottom portions of the recess portions
9
constitute a diaphragm
9
a.
In this case, the anisotropic etching is carried out by the anisotropic etching solution
7
and accordingly, sharp corners are formed at end portions
9
b
of the diaphragm
9
a.
When the end portions
9
b
of the diaphragm
9
a
are sharp corners, the pressure resistant strength of the diaphragm
9
a
is lowered.
Hence, conventionally, the Si wafer
1
having the recess portions
9
formed is immersed in an isotropic etching solution composed of, for example, an acid-base etching solution and the inner faces of the recess portions
9
are isotropically etched by which a processing of rounding the end portions of the diaphragm
9
a
is executed.
However, the isotropic etching processing is a diffusion controlled reaction and therefore, control of the reaction is difficult. Further, in the acid-base anisotropic etching solution, ageing change of composition is considerable. Therefore, there arises a problem where the depth dimension of the recess portion
9
formed in the Si wafer
1
, that is, the thickness dimension of the formed Si diaphragm
9
a
is significantly dispersed. Furthermore, there causes a drawback where the inner side bottom face of the recess portion
9
, that is, the surface of the Si diaphragm
9
a
is considerably roughened or a drawback where dimension D
1
of the diaphragm specified in
FIG. 17
is varied. This is because, when a face having crystal orientation of (
110
) of the Si wafer
1
(hereinafter, referred to as (
110
) face) is etched by the anisotropic etching solution
7
, impurities such as metal ions (for example, Pb) included in the anisotropic etching solution
7
by a very small amount are adsorbed on the etching face of the Si wafer
1
and the etching rate is varied by masking operation due to the adsorption of impurities.
Further, an example of a diaphragm for a semiconductor pressure sensor is disclosed in Japanese Patent Application Laid-Open No. H.4-119672. According to the example, an Si diaphragm having an octagonal shape is formed by etching an Si wafer having crystal orientation of (
110
). A specific explanation will be given of a method of forming this Si diaphragm in reference to
FIGS. 58 through 65
.
First, as shown by
FIGS. 58 and 59
, an etching mask
102
composed of SiN, SiO
2
or the like is formed and patterned on an upper face (left face in
FIG. 59
) of an Si wafer
101
having crystal orientation of (
110
). It is to be noted that gages, electrodes or the like having predetermined shapes have previously been formed on a lower face (right face in
FIG. 59
) of the Si wafer
1
. Then, anisotropic etching is carried out by immersing the Si wafer
101
in an alkaline etching solution composed of KOH or the like. Thereby, an Si diaphragm
103
having an octagonal shape shown in
FIGS. 60 and 61
is formed.
The Si wafer
101
in a state that the etching mask
102
is removed from the Si wafer
101
which has been finished with etching, is shown in
FIGS. 62 through 65
. As shown in
FIG. 62
, the Si diaphragm
103
having an octagonal shape is surrounded by two upper and lower (
100
) faces, two left and right (
111
) faces and four (
111
) faces at oblique positions. Further, as shown in
FIG. 63
, the two upper and lower (
100
) faces constitute inclined faces inclined relative to a diaphragm face
103
a
of the Si diaphragm
103
and an angle of inclination thereof (that is, angle produced by intersecting the (
100
) face with the diaphragm face
103
a
) is 45°.
Also, as shown in
FIG. 64
, the two left and right (
111
) faces constitute inclined faces inclined relative to the diaphragm face
103
a
and an angle of inclination thereof (that is, an angle produced by intersecting the left or right (
111
) face with the diaphragm face
103
a
) is 35°. By contrast, as shown by
FIG. 65
, the four (
111
) faces disposed at the oblique positions constitute faces vertical to the diaphragm face
103
a
and an angle of inclination thereof (that is, an angle produced by intersecting the four (
111
) faces at the oblique positions with the diaphragm face
103
a
) is 90°.
According to the example described above, the two upper and lower (
100
) faces and the two left and right (
111
) faces intersect with the diaphragm face
103
a
by small angles (45°, 35°) whereas the four (
111
) faces at the oblique positions are orthogonal to the diaphragm face
103
a.
Accordingly, when excessive pressure is applied on the diaphragm
103
, stress is concentrated at portions where the four (
111
) faces intersect the diaphragm face
103
a.
Thereby, the above-described portions may be destructed.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a method of etching an Si wafer capable of promoting accuracy of a depth dimension of a recess portion while being capable of rounding an end portion of an inner side bottom portion of the recess portion formed when the Si wafer is subjected to anisotropic etching. Further, it is another object of the present invention to provide a method of etching an Si wafer capable of promoting smoothness of an inner bottom face of a recess portion formed in etching an Si wafer and accuracy of dimension of the recess portion. It is still another object of the present invention to provide an Si wafer capable of increasing the strength of a diaphragm formed therein by preventing stress from concentrating on a portion of a peripheral edge portion of the diaphragm and a method of manufacturing the diaphragm.
According to a first aspect of the present invention, after carrying out a first step where an Si wafer is anisotropically etched by a predetermined depth, a second step where the Si wafer is subjected to isotropic etching while anodic oxidation is carried out to an etching face emerged in the first step by applying positive voltage for anodic oxidation on the Si wafer. In this case, a corner formed at an end portion of an inner side bottom portion of a recess portion of the Si wafer caused by the anisot

Affiliated with

Also associated with

Rating

Method of etching silicon wafer and silicon wafer does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method of etching silicon wafer and silicon wafer, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of etching silicon wafer and silicon wafer will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2478826