Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Reexamination Certificate
2002-04-24
2004-10-26
Norton, Nadine G. (Department: 1765)
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
C438S720000, C438S745000
Reexamination Certificate
active
06809034
ABSTRACT:
CROSS REFERENCE TO RELATED APPLICATIONS
This application is based upon and claims the benefit of Japanese Patent Applications No. 10-214495 filed on Jul. 29, 1998, No. 10-217725 filed on Jul. 31, 1998, and No. 10-276083 filed on Sep. 29, 1998, the contents of which are incorporated herein by reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a method of manufacturing a semiconductor device having a thin film resistor, and particularly to a method of etching a metallic thin film on the thin film resistor.
2. Description of the Related Art
A conventional method of manufacturing a CrSi resistor device including a CrSi resistor and a TiW barrier metal will be explained referring to
FIGS. 1A
to
1
D. First, as shown in
FIG. 1A
, a CrSi film is deposited on a silicon substrate
101
through a silicon oxide film
102
interposed therebetween, and is patterned in to a shape of a CrSi resistor
103
. Then, as shown in
FIG. 1B
, a TiW film
104
as barrier metal is deposited to cover the CrSi resistor
103
, and an Al film
105
is deposited as electrodes. After that, as shown in
FIG. 1C
, the Al film
105
is patterned by etching using a photo-resist
106
as a mask. As shown in FIG.,
1
D, an unnecessary part of the TiW film
104
is further removed by wet etching using the photo-resist
106
as a mask again.
FIG. 2
is an enlarged view showing a portion around the CrSi resistor
103
formed by the conventional method described above. As shown in the figure, the conventional method is accompanied by Al over-hanging such that the Al film
105
is inversely tapered by the wet etching for the TiW film
104
, and TiW under-cut such that the etching of the TiW film
104
progresses under the Al film
105
. As a result, the Al film
105
and the TiW film
104
form an inversely tapered cross-sectional shape as a whole. The inversely tapered cross-sectional shape adversely affect a shape of an intermediate insualtion film which covers the CrSi resistor device, and further affects not only a shape of a wiring pattern formed on the insulation film but also a shape of a protective film for covering the wiring pattern. This may result in breakage of the wiring pattern and cracks in the protective film.
Further, as shown in
FIG. 3
, when the under-cut amount of the TiW film
104
is large, it becomes difficult for an intermediate insulation film
108
to fill the under-cut portion. This results in deterioration of step-coverage, and allows invasion of water or the like. As a rsult, the reliability of the device is lowered. Incidetnally,
FIG. 3
omits the over-hanging porption of the Al film
105
.
SUMMARY OF THE INVENTION
The present invention has been made in view of the above problems. An object of the present invention is to prevent under-cut of a barrier metal from being produced by etching of the barrier metal. Another object of the present invention is to prevent over-hanging of a conductive film from being produced by etching of the barrier metal. Still another object of the present invention is to provide a semiconductor device including a thin film resistor with high reliability.
According to a first aspect of the present invention, a first opening is formed in a conductive film to expose a metallic film (barrier metal) that is formed on a thin film resistor, and then a mask is formed on the conductive film with a second opening having an opening area smaller than that of the first opening and open in the first opening to expose the metallic film therefrom. Then, the metallic film is etched through the second opening. Accordingly, because the metallic film is etched from an inner portion more than the opening end of the first opening, the metallic film underlying the conductive film is hardly etched, thereby preventing under-cut of the metallic film.
According to a second aspect of the present invention, after a first part of a metallic film is dry-etched through an opening of a conductive film, a second part of the metallic film directly contacting a thin film resistor is wet-etched. Because a side etching amount produced by dry-etching is smaller than that produced by wet-etching, a variation in the side etching amount produced during the etching of the metallic film is decreased. As a result, a variation in a contact width between the metallic film and the thin film resistor is decreased, thereby achieving high reliability of a semiconductor device.
According to a third aspect of the present invention, a conductive film is formed on a metallic film to have a thickness equal to or less than 300 nm, and the conductive film is patterned to have an upper surface area, a ratio of which relative to an upper surface area of a thin film resistor is equal to or more than 0.02. Then, the metallic film is etched through an opening of the conductive film. Accordingly, a variation in an etching amount produced due to a battery effect between the conductive film and the metallic film is decreased to prevent over-hanging of the conductive film and under-cut of the metallic film.
According to a fourth aspect of the present invention, after a surface portion of a metallic film is oxidized to form a surface oxide layer, a conductive film is formed on the surface oxide layer. Then, the surface oxide layer and the metallic film are wet-etched through an opening of the conductive film. In this case, a potential difference produced between the metallic film and the conductive film at the wet-etching step is decreased by the surface oxide layer. As a result, the conductive film is prevented from being etched during the wet-etching step, thereby preventing the overhanging of the conductive film.
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Office action dated Dec. 10, 2002, in Japanese Patent Application No. 10-217725 with English translation.
Notice of Reason for Rejection, Mailing Date: Sep. 3, 2002, Mailing No.: 270676.
Fukui Akito
Ito Ichiro
Ohkawa Makoto
Sakakibara Toshio
Shiraki Satoshi
Denso Corporation
Harness Dickey & Pierce PLC
Norton Nadine G.
Umez-Eronini Lynette T.
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