Method of erasing data in non-volatile semiconductor memory...

Details Method of erasing data in non-volatile semiconductor memory... Method of erasing data in non-volatile semiconductor memory...

2007-06-26

2007-06-26

Nguyen, Tan T. (Department: 2827)

Static information storage and retrieval

Floating gate

Particular biasing

C365S185220, C365S185240, C365S185290

Reexamination Certificate

active

11328224

ABSTRACT:
According to a method of erasing data in a non-volatile semiconductor memory device, block-round type overerase verify is performed. Specifically, overerase verify and write back are performed sequentially from a first address to a last address. That is, even when a write back pulse is applied after a certain address is selected and verify is performed, address increment from one address to another is performed, regardless of whether verify has been performed or not. Therefore, it is not that the same address is cumulatively rewritten, but write back to a memory cell corresponding to a defective address is sequentially and gradually performed. Accordingly, as write to a memory cell in an overerased state can evenly be performed, influence by off-leakage is suppressed, and a memory cell having threshold voltage distribution with less variation can be implemented.

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patent: 06-028875 (1994-02-01), None
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