Method of erasing a memory device and a method of programming a

Details Method of erasing a memory device and a method of programming a Method of erasing a memory device and a method of programming a

1998-09-08

2000-05-02

Nguyen, Tan T.

Static information storage and retrieval

Floating gate

Particular connection

36518518, 36518527, 36518528, G11C 1600

Patent

active

060580437

ABSTRACT:
A method of erasing and a method of programming a nonvolatile memory cell in a chip is disclosed. Said cell comprises a semiconductor substrate including a source and a drain region and a channel therebetween, a floating gate extending over a portion of said channel, a control gate extending over another portion of the channel region, and a program gate capacitively coupled through a dielectric layer to said floating gate. The methods or schemes are using substantially the lowest possible voltage to erase a nonvolatile memory cell of the floating-gate type without having the SILC problem. Therefore, these schemes are expected to allow a further scaling of the minimum feature size of Flash memory products which is necessary for cost reduction and density increase. The present invention also aims to further decrease the voltages necessary to erase/program the memory device without degrading the corresponding performance.

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European Patent Office Search Report, Application No. EP 98 87 0108.

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