Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate
2000-11-27
2002-07-30
Nelms, David (Department: 2818)
Static information storage and retrieval
Floating gate
Particular biasing
C365S185270, C365S185260, C365S185330
Reexamination Certificate
active
06426897
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates generally to a method of erasing a flash memory device. and more particularly to, a method of erasing a flash memory device by which erase operation is performed by hot carrier injection method, in such a manner that a ground potential is applied to the source and the bias from a high voltage to a low voltage is applied step by step to the gate. with a voltage of 5V being applied to the drain.
2. Description of the Prior Art:
Generally, the flash memory device performs a program operation by storing electrons in the floating gate using hot carrier injection method and also performs an erase operation by ejecting the electrons stored in the floating gate into the source or the bulk using F-N tunneling method.
The conventional method of programming the flash memory-device includes applying a positive voltage of about 10V to the gate terminal, applying a voltage of about 5V to the drain terminal and making the source terminal floating, as shown in FIG.
1
. Due to this bias. the electrons of the source are injected into the floating gate by hot carrier injection, so that program operation can be performed. The program method using the above-mentioned hot carrier injection method consumes about 7 &mgr;s time to program one (1) byte.
As can be seen from the schematic view of the cell shown in FIG.
2
. the conventional method of erasing the flash memory device includes applying a high negative voltage of about −9V to the gate terminal, making the source terminal and the drain terminal floating and applying a positive voltage of about 9V to the substrate. Due to this bias, the electrons stored in the floating gate are ejected into the source or the bulk by F-N tunneling. so that erase operation can be performed.
However, the erase method using the above-mentioned F-N tunneling method has a disadvantage that it consumes as long as about 1 second to erase one (1) sector. Also, in order to change a specific bit of data from “0” state to “1” state, there is a problem that a specific bit has to be again programmed with “0” state after 512 K cells are all erased with “1” state. That is a lot of time is required in mounting the device since the erase could not performed on a byte basis.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide a method of erasing a flash memory device by which erase operation can be performed on a byte basis using hot carrier injection method.
In order to accomplish the above object, a method of erasing a flash memory device is characterized in that erase is performed by hot carrier injection method, by applying a ground potential to a source and applying the bias from a high voltage to a low voltage step by step, with a first voltage being applied to a drain, wherein the bias of a floating gate in the flash memory device keeps a second voltage through a third voltage, which is the hot carrier injection condition and wherein the gate bias adjusts the bias applied according to the coupling ratio.
REFERENCES:
patent: 5357476 (1994-10-01), Kuo et al.
patent: 6026025 (2000-02-01), Chan et al.
patent: 411220045 (1998-11-01), None
Cho Soo Min
Jung Sung Mun
Lee Hee Gee
Lam David
Nelms David
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