Method of erasing a flash memory device

Static information storage and retrieval – Floating gate – Particular biasing

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

36518518, 36518526, G11C 1600

Patent

active

059598930

ABSTRACT:
The present invention discloses an erasure method which can minimize a flow of current from a drain region into a substrate due to a strong electric field formed between the drain region and the substrate when a flash memory device is erased. The first erasure operation is performed in condition that a voltage of -13V is applied to a control gate and a drain and source regions are grounded, and the second erasure operation is then performed in condition that a voltage of -13V is applied to the control gate, a voltage of 5V is applied to the drain region and the source region is floated.

REFERENCES:
patent: 5255237 (1993-10-01), Kodama
patent: 5295107 (1994-03-01), Okazawa et al.
patent: 5299166 (1994-03-01), Suh et al.
patent: 5327385 (1994-07-01), Oyama
patent: 5357476 (1994-10-01), Kuo et al.
patent: 5361235 (1994-11-01), Kodama
patent: 5412608 (1995-05-01), Oyama
patent: 5416738 (1995-05-01), Shrivastava

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Method of erasing a flash memory device does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method of erasing a flash memory device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of erasing a flash memory device will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-711178

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.