Method of ensuring parameter coherency in a multi-processor syst

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395472, 395475, 395495, 39518313, G06F 1130

Patent

active

056110731

ABSTRACT:
In a multiprocessing machine having several processors which take turns in executing an instruction, processing of two related parameters in one processor takes place at different times so that the parameters are non-coherent for a short time. Program counter addresses have a bit reserved as a flag which is set during non-coherence. When a CPU requests parameter values from the machine, coherency of the parameters is guaranteed by reading the flag as well as the parameters and a CPU software routine determines the coherent values.

REFERENCES:
patent: 4942521 (1990-07-01), Hanawa et al.
patent: 5193167 (1993-03-01), Sites et al.
patent: 5384713 (1995-01-01), Kleinfelder
patent: 5438575 (1995-08-01), Bertrand

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