Method of electroplating semiconductor wafer using variable curr

Details Method of electroplating semiconductor wafer using variable curr Method of electroplating semiconductor wafer using variable curr

1998-07-22

2000-06-13

Gorgos, Kathryn

Electrolysis: processes, compositions used therein, and methods

Electrolytic coating

Coating predominantly semiconductor substrate

205159, 205105, C25D 712, C25D 1132, C25D 554, C25D 518

Patent

active

060745444

ABSTRACT:
In electroplating a metal layer on a semiconductor wafer, the resistive voltage drop between the edge of the wafer, where the electrical terminal is located, and center of the wafer causes the plating rate to be greater at the edge than at the center. As a result of this so-called "terminal effect", the plated layer tends to be concave. This problem is overcome by first setting the current at a relatively low level until the plated layer is sufficiently thick that the resistive drop is negligible, and then increasing the current to improve the plating rate. Alternatively, the portion of the layer produced at the higher current can be made slightly convex to compensate for the concave shape of the portion of the layer produced at the lower current. This is done by reducing the mass transfer of the electroplating solution near the edge of the wafer to the point that the electroplating process is mass transfer limited in that region. As a result, the portion of the layer formed under these conditions is thinner near the edge of the wafer.

REFERENCES:
patent: 4304641 (1981-12-01), Grandia et al.
patent: 4624749 (1986-11-01), Black et al.
patent: 5437777 (1995-08-01), Kishi
patent: 5670034 (1997-09-01), Lowerty
patent: 5744019 (1998-04-01), Ang
patent: 5873992 (1999-02-01), Glezen et al.

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