Semiconductor device manufacturing: process – Making regenerative-type switching device
Reexamination Certificate
1999-10-29
2001-10-02
Bowers, Charles (Department: 2823)
Semiconductor device manufacturing: process
Making regenerative-type switching device
C438S107000, C438S118000, C257S707000, C257S713000
Reexamination Certificate
active
06297079
ABSTRACT:
The present invention relates to a method of electrically connecting insulated-gate bipolar transistor (IGBT) chips mounted on an integrated-circuit wafer.
Such a method conventionally consists in soldering collector, emitter and gate-control electrodes to corresponding connection locations of the chips.
Such electrodes generally consist of electrically conducting wires which electrically connect the gate and the emitter of each transistor to an electrical power supply source, these wires being ultrasonically welded to the gates and emitters.
This technique of connecting IGBT chips has a number of drawbacks.
First, the presence of wires soldered to one of the large faces of the integrated-circuit wafer prohibits the use of means for cooling the wafer on this face, which limits the number of chips which it is possible to mount on the wafer, since increasing the number of chips entails a commensurate increase in the supply current of the emitters and therefore an increase in the amount of heat dissipated.
Furthermore, in the weld zone, the materials which are in contact generally have different coefficients of expansion, which generates not insignificant mechanical stresses that may cause the electrodes to break.
The object of the invention is to overcome these drawbacks.
It therefore relates to a method of electrically connecting insulated-gate bipolar transistor chips mounted on an integrated-circuit wafer, consisting in soldering the collector, emitter and gate-control electrodes to corresponding connection locations of the chips, characterized in that at least some of the emitter electrodes are made in a single piece in the form of a plate of electrically conducting material which, on one of its large faces, has protruding parts which define connection pads that are soldered to the corresponding connection locations.
The electrical connection method according to the invention may furthermore have one or more of the following characteristics, taken individually or in any technically feasible combination:
the connection locations being covered with a metal layer, in particular aluminium, the electrical connection method includes the following steps prior to the soldering of the emitter electrodes:
deoxidizing the connection locations of the electrodes;
depositing a layer of antioxidant material on the deoxidized connection locations;
depositing the solder on the connection locations;
depositing the said plate on the integrated-circuit wafer so as to apply the protruding parts to the connection locations; and
placing the plate and the wafer in a reflow oven;
the antioxidant material is selected from nickel, chromium, gold, or an alloy of these materials;
the deoxidation step consists in treating the wafers with nitric acid;
during the production of the emitter electrodes, a hole is made in the piece for the gate electrode to pass through, with the interposition of an electrically insulating material;
during the production of the emitter electrodes, a gate-control electrode is produced by forming, in the said plate, a protruding pad which is associated with a supply track and is insulated from the rest of the plate, the pad being soldered to a corresponding connection location;
the said plate being made of an anodized metal, in particular aluminium, the production of the gate-control electrode includes the steps consisting in:
forming by metallization an electrically conductive layer covering the anodized surface of the pad forming the gate-control electrode;
forming the supply track by metallizing the anodized surface of the plate;
burying the metallized track; and
depositing a layer of antioxidant material on the pads;
subsequent to the step consisting in forming the supply track, a metal layer is deposited on the latter;
the step consisting in burying the metallized, track consists in anodizing the latter.
REFERENCES:
patent: 5319237 (1994-06-01), Legros
patent: 5635427 (1997-06-01), Takahashi
patent: 5767577 (1998-06-01), Nihei et al.
patent: 6072240 (2000-06-01), Kimura et al.
patent: 6127727 (2000-10-01), Eycheson
patent: 2335953 (1977-07-01), None
Patent Abstracts of Japan, vol. 098, No. 006, Apr. 30, 1998; & JP 10 056131 A (Denso corp), Feb. 24, 1998.
Changey Nicolas
Crouzy Sophie
Petitbon Alain
Ranchy Eric
Alstom Holdings
Bowers Charles
Lee Hsien-Ming
Sughrue Mion Zinn Macpeak & Seas, PLLC
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