Method of driving transistor and shift register performing...

Electrical pulse counters – pulse dividers – or shift registers: c – Shift register

Reexamination Certificate

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Details

C377S074000, C377S079000, C345S100000

Reexamination Certificate

active

10771797

ABSTRACT:
A shift register has multiple stages each of which includes a pull-up part to generate a current gate line driving signal having a first state in response to a first control signal and a clock signal, a pull-down part to generate the current gate line driving signal having a second state in response to a second control signal, a pull-up driver to generate the first control signal to control the pull-up part in response to a previous gate line driving signal provided from a previous stage, a following gate line driving signal provided from a following stage, and an input voltage signal externally provided, and a pull-down driver to generate the second control signal to control the pull-down part in response to a third control signal provided from the pull-up driver and the input voltage signal, in which the second control signal swings between first and second voltage levels in association with the input voltage signal that swings between predetermined voltage levels.

REFERENCES:
patent: 5517542 (1996-05-01), Huq
patent: 5859630 (1999-01-01), Huq
patent: 6236393 (2001-05-01), Ogawa et al.
patent: 6339631 (2002-01-01), Yeo et al.
patent: 2002/0044625 (2002-04-01), Kim et al.
patent: 2002/0149318 (2002-10-01), Jeon et al.
patent: 2003/0090614 (2003-05-01), Kim et al.
patent: 2004/0046729 (2004-03-01), Moon
patent: 2004/0207018 (2004-10-01), Jang et al.
patent: 0731441 (1996-09-01), None
European Search Report; Application No. EP04002418; Date Sep. 27, 2006 All the references cited in the Search Report are listed above.

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