Method of driving surface discharge plasma display panel

Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix

Reexamination Certificate

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Details

C345S067000, C345S068000, C315S169400

Reexamination Certificate

active

06256001

ABSTRACT:

TECHNICAL FIELD
The present invention relates to a method of driving a surface discharge plasma display panel, and more particularly, to a method for driving a three-electrode surface-discharge alternating-current plasma display panel(AC PDP).
BACKGROUND ART
FIG. 1
shows an electrode pattern of a conventional surface discharge plasma display panel.
FIG. 2
is a schematic sectional view of a pixel of FIG.
1
. Referring to
FIGS. 1 and 2
, the conventional surface discharge plasma display panel includes address electrodes A
1
, A
2
, A
3
, . . . , Am, a first dielectric
21
, a luminescent material
22
, scan electrodes Y
1
, Y
2
, . . . , Yn−1, Yn,
231
,
232
, common electrodes X,
241
,
242
, a second dielectric
25
, and a protective layer
26
. Each of the scan electrodes Y
1
, Y
2
, . . . , Yn−1, Yn, includes an indium tin oxide (ITO) scan electrode
231
and a bus scan electrode
232
. In the same manner, each of the common electrodes X,
241
,
242
includes a common ITO electrode
241
and a common bus electrode
242
. Gas for forming plasma is sealed between the protective layer
26
and a first dielectric
21
.
The address electrodes A
1
, A
2
, A
3
, . . . , Am are coated on a lower substrate (not shown) of a first substrate in a predetermined pattern. The first dielectric
21
is coated on the address electrodes A
1
, A
2
, A
3
, . . . , Am. The luminescent material
22
is coated on the first dielectric
21
in a predetermined pattern. Depending on circumstances, without forming the first dielectric
21
, the luminescent material
22
may be coated on the address electrodes A
1
, A
2
, A
3
, . . . , Am, in a predetermined pattern. The scan electrodes Y
1
, Y
2
, . . . , Yn−1, Yn,
231
,
242
and the common electrodes X,
241
,
242
are formed on an upper substrate (not shown) of a second substrate, such that they intersect with the address electrodes A
1
, A
2
, A
3
, . . . , Am. The respective intersections each define a corresponding pixel. The second dielectric
25
is coated on the scan electrodes Y
1
, Y
2
, . . . , Yn−1, Yn,
231
,
232
and the common electrodes X,
241
,
242
. The protective layer
26
for protecting the panel from a strong electrical field is coated on the second dielectric
25
.
In the prior art driving method of a surface discharge plasma display panel, a relatively high voltage is applied between the scan electrodes Y
1
, Y
2
, . . . , Yn−1, Yn,
231
,
232
and the common electrodes X,
241
,
242
to accumulate wall charges in the respective pixel by a surface discharge, and the wall-charges accumulated by the surface discharge are removed, in a resetting step. The conventional driving method is disclosed in U.S. Pat. No. 5,446,344.
FIG. 3
depicts a conventional driving method of a surface discharge plasma display panel.
In a first reset interval (a-b), a pulse of voltage Vaw, a pulse of voltage Vs+Vw, and 0 V are applied to the address electrodes Am, the common electrodes X, and the scan electrodes Y
1
, Y
2
, . . . , Yn, respectively. Here, the voltage Vs+Vw obtained by adding the voltage Vw to the scan voltage Vs is higher than the voltage Vaw. Accordingly, a relatively high voltage Vs+Vw is applied between the common electrodes X and the scan electrodes Y
1
, Y
2
, . . . , Yn, so that a surface discharge occurs between the common electrodes X and the scan electrodes Y
1
, Y
2
, . . . , Yn (‘a’ of FIG.
3
). Positive (+) wall-charges are accumulated in the positive layer
26
of
FIG. 2
under each of the scan electrodes
231
,
232
of
FIG. 2
, and negative(−) wall-charges are accumulated in the positive layer
26
under the common electrodes
241
,
242
of FIG.
2
.
The voltage of the wall-charges accumulated during the first reset interval (a-b) is a re-dischargeable voltage. In a second reset interval (b-c), 0 V is applied to the address electrodes Am, the common electrodes X, and the scan electrodes Y
1
, Y
2
, . . . , Yn. Accordingly, due to the wall-charges accumulated during the first reset interval (a-b), a surface discharge occurs between the common electrodes X and the scan electrodes Y
1
, Y
2
, . . . , Yn. The wall-charges of all pixels then removed.
In an address step, in a state in which a pulse of voltage Vax is applied to the common electrodes X, scan pulses of a voltage −Vy are sequentially applied to each of the scan electrodes Y
1
, Y
2
, . . . , Yn. When the scan pulse is not applied, a negative voltage−Vsc which is a level lower than the voltage −Vy of the scan pulse is applied. When a pulse of the address voltage Va is applied to an address electrode Am selected while the scan pulse is applied to a scan electrode Y
1
, Y
2
, . . . , Yn, for example, during interval (c-d) for the scan electrode Y
1
, a facing discharge is performed in a corresponding pixel. This is because a voltage for facing discharge Va+Vy is applied between the corresponding scan electrode Y
1
, Y
2
, . . . , or Yn and the selected address electrode Am. At this time, when a negative voltage −Vsc which is lower than the voltage −Vy of the scan pulse is applied, the facing discharge stops. Positive(+) wall-charges are than accumulated under the scan electrodes
231
,
232
of the selected pixel.
In a first sustaining discharge interval (g-h), a pulse of the voltage Vs/2 which is ½ the scan voltage Vs, 0V, and a pulse of the sustaining discharge voltage Vs, are applied to the address electrodes Am, the common electrode X, and the scan electrodes Y
1
, Y
2
, . . . , Yn, respectively. That is, in a state in which positive(+) wall-charges are accumulated under the scan electrode Y
1
, Y
2
, . . . , or Yn of the selected pixel, when a relatively high negative-voltage is applied between the scan electrodes Y
1
, Y
2
, . . . , Yn and the common electrodes X, a surface discharge occurs in the selected pixel. When the surface discharge is performed in the selected pixel, plasma is formed in a gas layer of a corresponding region, and a luminescent material
22
of
FIG. 2
is excited by an UV-ray to emit light.
In a second sustaining discharge interval (i-j), a a pulse of the voltage Vs/2 which is ½ the scan voltage Vs, and pulse of the sustaining discharge voltage Vs, and 0V, are applied to the address electrodes Am, the common electrodes X, and the scan electrodes Y
1
, Y
2
, . . . , Yn, respectively. That is, in a state in which wall-charges are accumulated, when a relatively high negative voltage is applied between the scan electrodes Y
1
, Y
2
, . . . , Yn and the common electrodes X, a surface discharge occurs in a selected pixel. Positive(+) wall-charges are then accumulated under the scan electrodes
231
,
232
of the selected pixel, and negative(−) wall-charges are accumulated under the common electrodes
241
,
242
. When the surface discharge is performed in the selected pixel, plasma is formed in a gas layer of a corresponding region, and a luminescent material
22
is excited by a UV-ray to emit light. The operations of the first and second sustained discharge intervals are repeated during the sustaining discharge period, to thereby maintain the emission of light at the selected pixel.
In the conventional driving method, in the resetting step (interval a-c of FIG.
3
), a pulse of a relatively high voltage Vs+Vw is applied between the common electrodes X and the scan electrodes Y
1
, Y
2
, . . . , Yn, so that a surface discharge occurs. Accordingly, the light of relatively high brightness is emitted from the unselected pixels, to thereby decrease the contrast of a display screen.
DISCLOSURE OF INVENTION
It is an object of the present invention to provide a driving method of a surface discharge plasma display panel for emitting the light of relatively low brightness from the pixels unselected in each sub-field.
To accomplish the above object of the present invention, a driving method of a surface discharge plasma display panel is adopted to a surface discharge plasma display panel having a first su

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