Electric lamp and discharge devices: systems – Plural power supplies – Plural cathode and/or anode load device
Reexamination Certificate
2001-05-04
2002-10-29
Wong, Don (Department: 2821)
Electric lamp and discharge devices: systems
Plural power supplies
Plural cathode and/or anode load device
C345S067000
Reexamination Certificate
active
06472826
ABSTRACT:
CROSS-REFERENCE TO RELATED APPLICATIONS
This application claims the benefit of Korean Application No. 2000-60256, filed Oct. 13, 2000, in the Korean Industrial Property Office, the disclosure of which is incorporated herein by reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method of driving a plasma display panel, and more particularly, to an address-while-display driving method of driving an alternating current (AC) type triode surface-discharge plasma display panel.
2. Description of the Related Art
The structures of plasma display panels are largely classified into a counter-discharge structure and a surface-discharge structure depending on the arrangement of discharging electrodes. In addition, methods of driving a plasma display panel are classified into a direct current (DC) driving method and an AC driving method depending on whether the polarity of a driving voltage changes or not.
Referring to
FIGS. 1A and 1B
, discharge spaces
16
are formed between front glass substrates
10
and
1
and rear glass substrates
20
and
2
in a plasma display panel of DC type counter-discharge structure and a plasma display panel of AC type surface-discharge structure.
Referring to
FIG. 1A
, in the DC type plasma display panel, a scan electrode
18
and an address electrode
11
are directly exposed to the discharge space
16
. Referring to
FIG. 1B
, in the AC type plasma display panel, display electrodes
3
for performing display are disposed within a dielectric layer
5
so that the display electrodes
3
(x-y electrodes) are electrically separated from the discharge space
16
. Here, display is performed by a well-known wall-charge effect. For example, in discharge cells where discharge is provoked between an address electrode
8
and a scan electrode
3
a
, wall charges are formed around the address electrode
8
and the scan electrode
3
a
. Thereafter, a voltage lower than a discharge triggering voltage is applied between the scan electrode
3
a
and a common electrode
3
b
so that display can be performed only in discharge cells where wall charges are formed around the scan electrode
3
a
. Reference numeral
5
′ denotes a dielectric layer covering the address electrode
8
.
Referring to
FIG. 2
, address electrodes
8
, dielectric layers
5
and
5
′, X-Y electrodes
3
, barriers
6
and magnesium monoxide (MgO) layer
9
as a protective layer are provided between a front glass substrate
1
and a rear glass substrate
2
in a usual AC type triode surface-discharge plasma display panel. A metal electrode
4
is used to increase the conductivity of each X-Y electrode
3
.
The address electrodes
8
are formed to be parallel on the top surface of the rear glass substrate
2
. The rear dielectric layer
5
′ is deposited on the entire surface of the rear glass substrate
2
having the address electrode lines
8
. The barriers
6
are formed on the surface of the rear dielectric layer
5
′ such that the barriers
6
are parallel to the address electrodes
8
. The barriers
6
define the discharge areas of discharge cells and prevent optical cross talk between the discharge cells. A phosphor layer
7
is formed between the barriers
6
. The phosphor layer
7
generates light having a color (red, green or blue) corresponding to ultraviolet rays generated due to the discharge of each discharge cell.
The X-Y electrodes
3
are formed on the bottom surface of the front glass substrate
1
such that the X-Y electrodes
3
are perpendicular to the address electrodes
8
. The X-Y electrodes
3
cross the address electrodes
8
to form the discharge cells. The front dielectric layer
5
is deposited on the entire bottom surface of the front glass substrate
1
having the X-Y electrodes
3
. The MgO layer
9
, which protects the display panel from an intensive electric field, is deposited on the entire surface of the front dielectric layer
5
. Gas for forming plasma is sealed in a resulting discharge space.
FIG. 3
illustrates a typical address-display separation driving method for the AC type triode surface-discharge plasma display panel of FIG.
2
.
FIG. 4
illustrates the interconnections between electrodes
3
that perform the driving method of
FIG. 3
in the plasma display panel of FIG.
2
. Reference numerals
3
a
and
3
b
of
FIG. 4
denote the X-Y electrodes
3
of FIG.
2
.
Referring to
FIGS. 3 and 4
, a unit frame (i.e., a unit television field) is divided into 6 sub-fields SF
1
through SF
6
to realize time division gradation display. In addition, each of the sub-fields SF
1
through SF
6
is divided into address periods A
1
through A
6
and display periods S
1
through S
6
.
During each of the address periods A
1
through A
6
, a display data signal is applied to address electrodes A
R1
, A
G1
, A
B1
, . . . , A
Gn
and A
Bn
, and simultaneously, corresponding scan pulses are sequentially applied to Y electrodes Y
1
through Y
480
. Accordingly, when the display data signal of a high level is applied while scan pulses are being applied, wall charges are formed in corresponding discharge cells due to an address discharge. In discharge cells other than the corresponding discharge cells, wall charges are not formed.
During each of the display periods S
1
through S
6
, a display pulse is alternately applied to all the Y electrodes Y
1
through Y
480
and the all X electrodes X
1
through X
480
so that display is performed in discharge cells where wall charges are formed during each corresponding address period A
1
, . . . or A
6
. Therefore, the luminance of a plasma display panel is proportional to the time of the display periods S
1
through S
6
in a unit television field.
Here, the display period S
1
of the first sub-field SF
1
is set to a time
1
T corresponding to 2
0
. The display period S
2
of the second sub-field SF
2
is set to a time
2
T corresponding to 2
1
. The display period S
3
of the third sub-field SF
3
is set to a time
4
T corresponding to 2
2
. The display period S
4
of the fourth sub-field SF
4
is set to a time
8
T corresponding to 2
3
. The display period S
5
of the fifth sub-field SF
5
is set to a time
16
T corresponding to 2
4
. The display period S
6
of the sixth sub-field SF
6
is set to a time
32
T corresponding to 2
5
. Consequently, among the
6
sub-fields SF
1
through SF
6
, a sub-field to be displayed can be appropriately selected so that gradation can be realized.
FIGS. 5A
to
5
F illustrate driving signals in the unit sub-field SF
1
according to the address-display separation driving method of FIG.
3
. In
FIGS. 5B
to
5
F, reference character S
AR1
, . . . ,
ABn
denotes a driving signal applied to the address electrodes A
R1
, A
G1
, . . . , A
Gn
and A
Bn
of
FIG. 4
, reference character S
X1
, . . . ,
X480
denotes a driving signal applied to the X electrodes X
1
through X
480
of
FIG. 4
, and reference character S
Y1
, . . . ,
Y480
denotes a driving signal applied to the Y electrodes Y
1
through Y
480
of FIG.
4
. Referring to
FIG. 5A
, the address period A
1
in the unit sub-field SF
1
is divided into reset periods A
11
, A
12
and A
13
and a main address period A
14
.
During the display period S
1
, a display pulse
25
is alternately applied to all the Y electrodes Y
1
through Y
480
and all the X electrodes X
1
through X
480
so that display is performed in discharge cells where wall charges are formed during the corresponding address period A
1
. When a final pulse is applied to the X electrodes X
1
through X
480
during the display period S
1
, electrons are formed around X electrodes of selected discharge cells for display and positive charges are formed around Y electrodes thereof. Accordingly, during the first reset period, a pulse
22
a
having a lower voltage and larger width than the display pulse
25
is applied to the X electrodes X
1
through X
480
so that discharging for primarily removing wall charges is performed. In addition, during the second reset period A
12
, a pulse
23
having the same voltag
Kang Kyoung-ho
Lee Joo-yul
Lee Seong-charn
Samsung SDI & Co., Ltd.
Tran Thuy Vinh
Wong Don
LandOfFree
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